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參數(shù)資料
| 型號： | 74LCX126MX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFFER QUAD LV N-INV 14SOIC |
| 標準包裝： | 1 |
| 系列： | 74LCX |
| 邏輯類型： | 緩沖器/線路驅(qū)動器，非反相 |
| 元件數(shù)： | 4 |
| 每個元件的位元數(shù)： | 1 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 14-SOIC |
| 包裝： | 標準包裝 |
| 其它名稱： | 74LCX126MXDKR |
74LCX126
—
Lo
w
V
olta
g
e
Quad
Buff
er
with
5V
T
olerant
Inputs
and
Outputs
2000 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LCX126 Rev. 1.5.1
74LCX126
Low Voltage Quad Buffer with 5V Tolerant
Inputs and Outputs
Features
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V VCC specifications provided
■ 5.5ns tPD max. (VCC = 3.3V), 10A ICC max.
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal(1)
■ ±24mA output drive (VCC = 3.0V)
■
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance:
– Human body model
> 2000V
– Machine model
> 100V
■ Leadless DQFN package
Note:
1. To ensure the high-impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX126 contains four independent non-inverting
buffers with 3-STATE outputs. Each output is disabled
when the associated output-enable (OE) input is LOW.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
The 74LCX126 is fabricated with an advanced CMOS
technology to achieve high speed operation while main-
taining CMOS low power dissipation.
Ordering Information
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number
Package Description
74LCX126M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX126SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX126BQX(2)
MLP14A
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74LCX126MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Implements proprietary noise/EMI reduction circuitry
December 2013
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