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參數(shù)資料
| 型號： | SX1508IULTRT |
| 廠商： | Semtech |
| 文件頁數(shù)： | 17/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC GPIO EXPANDER I2C 8CH 20QFN |
| 特色產(chǎn)品： | SX1508/SX1509 GPIO Expanders |
| 標準包裝： | 1 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 1.2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-UFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-QFN-UT（3x3） |
| 包裝： | 標準包裝 |
| 包括： | LED 驅(qū)動器 / 小鍵盤引擎 |
| 其它名稱： | SX1508IULDKR |
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ADVANCED COMMUNICATIONS & SENSING
Rev 1 – 30
th Oct. 2009
24
www.semtech.com
SX1507/SX1508/SX1509
World’s Lowest Voltage Level Shifting GPIO
with LED Driver and Keypad Engine
Addr
Name
Default
Bits
Description
7:4
Unused
0x00
RegInputDisable
0xX0
3:0
Disables the input buffer of each IO
0 : Input buffer is enabled (input actually being used)
1 : Input buffer is disabled (input actually not being used or LED connection)
7:4
Unused
0x01
RegLongSlew
0xX0
3:0
Enables increased slew rate of the output buffer of each [output-configured] IO
0 : Increased slew rate is disabled
1 : Increased slew rate is enabled
7:4
Unused
0x02
RegLowDrive
0xX0
3:0
Enables reduced drive of the output buffer of each [output-configured] IO
0 : Reduced drive is disabled
1 : Reduced drive is enabled
7:4
Unused
0x03
RegPullUp
0xX0
3:0
Enables the pull-up for each IO
0 : Pull-up is disabled
1 : Pull-up is enabled
7:4
Unused
0x04
RegPullDown
0xX0
3:0
Enables the pull-down for each IO
0 : Pull-down is disabled
1 : Pull-down is enabled
7:4
Unused
0x05
RegOpenDrain
0xX0
3:0
Enables open drain operation for each [output-configured] IO
0 : Regular push-pull operation
1 : Open drain operation
7:4
Unused
0x06
RegPolarity
0xX0
3:0
Enables polarity inversion for each IO
0 : Normal polarity : RegData[x] = IO[x]
1 : Inverted polarity : RegData[x] = !IO[x] (for both input and output configured IOs)
7:4
Unused
0x07
RegDir
0xXF
3:0
Configures direction for each IO.
0 : IO is configured as an output
1 : IO is configured as an input
7:4
Unused
0x08
RegData
0xXF
3:0
Write: Data to be output to the output-configured IOs
Read: Data seen at the IOs, independent of the direction configured.
7:4
Unused
0x09
RegInterruptMask
0xXF
3:0
Configures which [input-configured] IO will trigger an interrupt on NINT pin
0 : An event on this IO will trigger an interrupt
1 : An event on this IO will NOT trigger an interrupt
7:6
Edge sensitivity of RegData[3]
5:4
Edge sensitivity of RegData[2]
3:2
Edge sensitivity of RegData[1]
0x0A
RegSense
0x00
1:0
Edge sensitivity of RegData[0]
00 : None
01 : Rising
10 : Falling
11 : Both
7:4
Unused
0x0B
RegInterruptSource
0xX0
3:0
Interrupt source (from IOs set in RegInterruptMask)
0 : No interrupt has been triggered by this IO
1 : An interrupt has been triggered by this IO (an event as configured in relevant
RegSense register occured).
Writing '1' clears the bit in RegInterruptSource and in RegEventStatus
When all bits are cleared, NINT signal goes back high.
7:4
Unused
0x0C
RegEventStatus
0xX0
3:0
Event status of all IOs.
0 : No event has occured on this IO
1 : An event has occured on this IO (an edge as configured in relevant RegSense
register occured).
Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.
If the edge sensitivity of the IO is changed, the bit(s) will be cleared automatically
7
Unused
6:5
Oscillator frequency (fOSC) source
00 : OFF. LED driver and debounce features are disabled.
01 : External clock input (OSCIN)
10 : Internal 1MHz oscillator
11 : Reserved
4
OSCIO pin function (Cf. §4.8)
0 : OSCIO is an input (OSCIN)
1 : OSCIO is an output (OSCOUT)
0x0D
RegClock
0x00
3:0
Frequency of the signal output on OSCOUT pin:
0x0 : 0Hz, permanent "0" logical level (GPO)
0xF : 0Hz, permanent "1" logical level (GPO)
Else : fOSCOUT = fOSC/(2^(RegClock[3:0]-1))
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