LT8668SX-D
龍迅/Lontium
22+
BGA288
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1. 一般的描述
LT8668SX-D可以配置為在HDMI2.1標(biāo)準(zhǔn)下工作,最大數(shù)據(jù)速率為8Gbps。
LT8668SX-D也可以配置為在DP1.4a下工作,數(shù)據(jù)速率高達(dá)8.1Gbps。
對(duì)于LVDS輸出,LT8668SX-D可配置為單端口、雙端口或四端口LVDS,具有1條高速時(shí)鐘通道和3~5條高速數(shù)據(jù)通道,每條通道最大工作速度為1.2Gbps,可支持總帶寬高達(dá)24Gbps。LT8668SX-D支持靈活的2D和并排3D應(yīng)用視頻數(shù)據(jù)映射路徑。
對(duì)于MIPI輸出,LT8668SX-D具有可配置的單端口或雙端口或四端口MIPI?DSI/CSI,具有1個(gè)高速時(shí)鐘通道和1~4個(gè)高速數(shù)據(jù)通道,具有D-PHY,每通道最大運(yùn)行2.5Gbps,可支持四個(gè)端口的總帶寬高達(dá)40Gbps。C-PHY還支持每通道5.7Gbps,四個(gè)端口可支持總帶寬高達(dá)68.4Gbps。
eDP1.4輸出由8個(gè)數(shù)據(jù)通道組成,支持RBR (1.62Gbps)、HBR (2.7Gbps)和HBR2 (5.4Gbps)鏈路速度。內(nèi)置可選的SSC功能,降低了對(duì)EMI相關(guān)系統(tǒng)應(yīng)用的EMI影響。
對(duì)于eDPx輸出,它由8個(gè)數(shù)據(jù)通道組成,每條通道最大運(yùn)行速度為3Gbps,可以支持4K@60Hz。
數(shù)字音頻接口有I2S和SPDIF兩種。I2S接口支持8-ch LPCM, SPDIF接口支持2-ch LPCM或壓縮音頻,最大采樣率均為192 KHz。
該設(shè)備能夠通過集成的微處理器實(shí)現(xiàn)自動(dòng)操作,該微處理器使用嵌入式SPI閃存進(jìn)行固件存儲(chǔ)。系統(tǒng)控制也可用
通過配置I2C從接口。
2. 特性
?HDMI2.1接收器
?USB Type-C
?DP1.4a/eDP1.4b接收端
?HDMI2.1發(fā)射器
DP1.4a變送器
?四端口LVDS發(fā)射器
?四端口MIPI?DSI/CSI發(fā)射器
?eDP1.4b/eDPx發(fā)射器
?數(shù)字音頻輸入和輸出
?視頻處理
3.應(yīng)用程序
?顯示系統(tǒng)主板,顯示器
?顯示系統(tǒng)的pc和嵌入式應(yīng)用顯示
1. General Description
LT8668SX-D can be configured to work under HDMI2.1 standard with maximum 8Gbps data rate.
LT8668SX-D also can be configured to work under DP1.4a with up to 8.1Gbps data rate.
For LVDS output, LT8668SX-D can be configured as single, dual or quad-port LVDS with 1 high-speed clock lane, and 3~5 high-speed data lanes, operating at maximum 1.2Gbps per lane, which can support a total bandwidth of up to 24Gbps. LT8668SX-D supports flexible video data mapping path for 2D and side by side 3D applications.
For MIPI output, LT8668SX-D features configurable single-port or dual-port or quad-port MIPI?DSI/CSI with 1 high-speed clock lane and 1~4 high-speed data lanes operating at maximum 2.5Gbps per lane with D-PHY, which can support a total bandwidth of up to 40Gbps for four port. Also support 5.7Gbps per lane with C-PHY, which can support a total bandwidth of up to 68.4Gbps for four port.
For eDP1.4 output, it consists of 8 data lanes, supporting RBR (1.62Gbps), HBR (2.7Gbps) and HBR2 (5.4Gbps) link speeds. The build-in optional SSC function reduces EMI effect on EMI-concerned system application.
For eDPx output, it consists of 8 data lanes, with operating at maximum 3Gbps per lane, can support 4K@60Hz.
Two digital audio interfaces are available I2S and SPDIF. The I2S interface supports 8-ch LPCM and the SPDIF interface supports 2-ch LPCM or compressed audio, both at maximum 192 KHz sample rate.
The device is capable of automatic operation which is enabLED by an integrated microprocessor that uses an embedded SPI flash for firmware storage. System control is also available
through the configuration I2C slave interface.
2. Features
? HDMI2.1 Receiver
? USB Type-C
? DP1.4a/eDP1.4b Receiver
? HDMI2.1 Transmitter
? DP1.4a Transmitter
? Four-Port LVDS Transmitter
? Four-Port MIPI? DSI/CSI Transmitter
? eDP1.4b/eDPx Transmitter
? Digital Audio Input and Output
? Video Process
? DSC Decoder and Encoder
3. Applications
? Display System on Motherboard, Monitor
? Display System for PCs and embedded applications Display
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