參數(shù)資料
型號： R5F6411FNFN
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 50 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 77/84頁
文件大?。?/td> 1206K
代理商： R5F6411FNFN
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
92
Table 15-3 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM mode.
Table 15-4 shows the COM0A1:0 bit functionality when the WGM02:0 bits are set to phase correct PWM mode.
Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the output compare pin (OC0B) behavior. If one or both of the COM0B1:0 bits are set, the OC0B output
overrides the normal port functionality of the I/O pin it is connected to. However, note that the data direction register (DDR)
bit corresponding to the OC0B pin must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the WGM02:0 bit setting.Table 15-5
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to a normal or CTC mode (non-PWM).
Table 15-3. Compare Output Mode, Fast PWM Mode(1)
COM0A1
COM0A0
Description
0
Normal port operation, OC0A disconnected.
0
1
WGM02 = 0: Normal port operation, OC0A disconnected.
WGM02 = 1: Toggle OC0A on compare match.
1
0
Clear OC0A on compare match, set OC0A at BOTTOM,
(non-inverting mode).
1
Set OC0A on compare match, clear OC0A at BOTTOM,
(inverting mode).
Note:
1.
A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the compare match is
ignored, but the set or clear is done at BOTTOM. See Section 15.7.3 “Fast PWM Mode” on page 87 for more
details.
Table 15-4. Compare Output Mode, Phase Correct PWM Mode(1)
COM0A1
COM0A0
Description
0
Normal port operation, OC0A disconnected.
0
1
WGM02 = 0: Normal port operation, OC0A disconnected.
WGM02 = 1: Toggle OC0A on compare match.
1
0
Clear OC0A on compare match when up-counting. Set OC0A on compare match
when down-counting.
1
Set OC0A on compare match when up-counting. Clear OC0A on compare match
when down-counting.
Note:
1.
A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the compare match is
ignored, but the set or clear is done at TOP. See Section 16.9.4 “Phase Correct PWM Mode” on page 111 for
more details.
Table 15-5. Compare Output Mode, non-PWM Mode
COM0B1
COM0B0
Description
0
Normal port operation, OC0B disconnected.
0
1
Toggle OC0B on compare match
1
0
Clear OC0B on compare match
1
Set OC0B on compare match
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F6411FNFN#U0 制造商:Renesas Electronics Corporation 功能描述:MCU 5.5V 512K ROM - Trays
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R5F6411FNLG#U0 功能描述:MCU 256+8KB FLASH 100-TFLGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C/R32C/100/111 產(chǎn)品培訓(xùn)模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標(biāo)準(zhǔn)包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設(shè)備:DMA，POR，PWM，WDT 輸入/輸出數(shù):121 程序存儲器容量:384KB（384K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 34x10b，D/A 2x8b 振蕩器型:內(nèi)部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤 產(chǎn)品目錄頁面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87
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