參數(shù)資料
型號： Z86E0812SEC
廠商： ZILOG INC
元件分類： 微控制器/微處理器
英文描述： CMOS Z8 OTP Microcontrollers
中文描述： 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDSO18
封裝： SOIC-18
文件頁數(shù)： 33/44頁
文件大?。?/td> 251K
代理商： Z86E0812SEC
Z86E04/E08
Zilog
CMOS Z8 OTP Microcontrollers
DS97Z8X0401
P R E L I M I N A R Y
33
1
Low EMI Emission
The Z86E04/E08 can be programmed to operate in a low
EMI Emission (Low Noise) Mode by means of an EPROM
programmable bit option. Use of this feature results in:
I
Less than 1 mA consumed during HALT Mode.
I
All drivers slew rates reduced to 10 ns (typical).
I
Internal SCLK/TCLK = XTAL operation limited to a
maximum of 4 MHz - 250 ns cycle time.
I
Output drivers have resistances of 500 ohms (typical).
I
The Z86E04/E08 offers programmable ROM Protect and
programmable Low Noise features. When programmed for
Low Noise, the ROM Protect feature is optional.
Oscillator divide-by-two circuitry eliminated.
In addition to V
DD
and GND (V
SS
), the Z86E04/E08 chang-
es all its pin functions in the EPROM Mode. XTAL2 has no
function, XTAL1 functions as /CE, P31 functions as /OE,
P32 functions as EPM, P33 functions as V
PP
, and P02
functions as /PGM.
ROM Protect.
ROM Protect fully protects the Z86E04/E08
ROM code from being read externally. When ROM Protect
is selected, the instructions LDC and LDCI
are supported
(Z86E04/E08 and Z86C04/C08 do not support the instruc-
tions of LDE and LDEI). When the device is programmed
for ROM Protect, the Low Noise feature will not automati-
cally be enabled.
Please note that when using the device in a noisy environ-
ment, it is suggested that the voltages on the EPM and CE
pins be clamped to V
CC
through a diode to V
CC
to prevent
accidentally entering the OTP Mode. The V
PP
requires
both a diode and a 100 pF capacitor.
Auto Latch Disable.
Auto Latch Disable option bit when
programmed will globally disable all Auto Latches.
WDT Enable.
The WDT Enable option bit, when pro-
grammed, will have the hardware enabled Permanent
WDT enabled after exiting reset and can not be stopped in
Halt or Stop Mode.
EPROM/Test Mode Disable.
The EPROM/Test Mode
Disable option bit, when programmed, will disable the
EPROM Mode and the Factory Test Mode. Reading, veri-
fying, and programming the Z8 will be disabled. To fully
verify that this mode is disabled, the device must be power
cycled.
User Modes.
Table 7 shows the programming voltage of
each mode of Z86E04/E08.
Table 7. OTP Programming Table
Programming Modes
EPROM READ1
EPROM READ2
PROGRAM
PROGRAM VERIFY
EPROM PROTECT
LOW NOISE SELECT
AUTO LATCH DISABLE
WDT ENABLE
EPROM/TEST MODE
V
PP
NU
NU
V
H
V
H
V
H
V
H
V
H
V
H
V
H
EPM
V
H
V
H
X
X
V
H
V
IH
V
IH
V
IL
V
IL
/CE
V
IL
V
IL
V
IL
V
IL
V
H
V
H
V
H
V
H
V
H
/OE
V
IL
V
IL
V
IH
V
IL
V
IH
V
IH
V
IL
V
IH
V
IL
/PGM
V
IH
V
IH
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
V
IL
ADDR
ADDR
ADDR
ADDR
ADDR
NU
NU
NU
NU
NU
DATA
Out
Out
In
Out
NU
NU
NU
NU
NU
V
CC
*
4.5V
5.5V
6.4V
6.4V
6.4V
6.4V
6.4V
6.4V
6.4V
Notes:
1. V
H
=13.0V
±
0.25 V
DC
.
2. V
IH
= As per specific Z8 DC specification.
3. V
IL
= As per specific Z8 DC specification.
4. X = Not used, but must be set to V
H
or V
IH
level.
5. NU = Not used, but must be set to either V
IH
or V
IL
level.
6. I
PP
during programming = 40 mA maximum.
7. I
CC
during programming, verify, or read = 40 mA maximum.
8. * V
CC
has a tolerance of
±
- 0.25V.
9. V
CC
= 5.0V is acceptable.
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