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參數(shù)資料
| 型號(hào)： | μPD441000L-X |
| 廠商： | NEC Corp. |
| 英文描述： | 1M-Bit CMOS Static RAM(1M 位CMOS 靜態(tài)RAM) |
| 中文描述： | 100萬位CMOS靜態(tài)RAM（100萬位的CMOS靜態(tài)RAM）的 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 54K |
| 代理商： | ΜPD441000L-X |
F E A T U R E S
O R D E R I N G
I N F O R M A T I O N
V
R
4120 C P U C O R E
—
MIPS III ISA-compliant
—
MIPS 16 ASE-compliant for compact code density
(40% denser code than MIPS32)
—
Five-stage pipeline running up to 168 MHz
—
Single-cycle 32-bit MAC instruction for digital signal
processing operations
MEMO R Y MA NA G EMENT UNIT
—
32-bit physical address range of 4 GB with
40-bit virtual address space
—
32 double-entry TLBs supporting 1~256 KB page sizes
—
Up to 64 MB of SDRAM/EDO/fast-page DRAM and
64 MB of SROM/flash memory/mask ROM
—
Up to 66-MHz operation
C A C HE MEMO R Y UNIT
—
16-KB direct-mapped instruction cache
—
8-KB direct-mapped data cache
—
Write-back cache for reducing store operations
B US C O NT R O L UNIT
—
32-bit and 16-bit addressing
—
Dynamic bus sizing; subset of ISA bus
P O WER MA NA G EMENT UNIT WIT H
F O UR P O WER -S A V ING MO D ES
—
Full speed
—
Standby
—
Suspend
—
Hibernate
C L O C K G ENER A T O R UNIT
—
Built-in PPL for frequency multiplication
—
External bus frequency of 16/33 MHz
S ER IA L INT ER FA C E UNIT
—
16550-compatible
—
RS-232C compliant
—
Up to 115 kbps
—
Separate debugging serial port
O T HER P ER IP HER A L S
—
Real-time clock
with four built-in timers
—
Interrupt control unit
with internal and external
interrupts
—
DMA address unit
and
DMA control unit
with
five different channels
—
General-purpose I/O unit
with 49 general-purpose
I/O pins
—
96-key
keyboard
and
touch-panel interface
—
10-bit
A /D converter
for
touch-pannel
and
audio
input
—
Fast IR unit:
0.5 to 4 Mbps IrDA 1.1 standard
communication
—
A udio interface unit
and 10-bit
D/A converter
for
audio output
—
Host signal processing unit
with glueless
interface to telecom codec for software modem
implementation
A C /D C S P EC IF IC A T IO NS
—
131 and 168 MHz maximum frequency
—
2.5- and 3.3-volt operation
—
131 MHz at 300-mW typical power consumption
(target specification)
— 168 MHz at 385-mW typical power consumption
(target specification)
PA C K A G E
—
Compact size: 16 x 16 x 1.3 mm
—
224-pin FPBGA
—
V
R
4102
TM
and V
R
4111 pin compatibility
PA R T NUMB ER
μPD30121S1-131-3C
μPD30121S1-168-3C
PA C K A G E
224-pin FPBGA
224-pin FPBGA
MA X IMUM O P ER A T ING F R EQ UENC Y
131 MHz
168 MHz
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