參數(shù)資料
型號： μPD703001
廠商： NEC Corp.
英文描述： 16/32 Bit Single Chip Microcontrollers(16/32位單片微控制器)
中文描述： 16/32位單片機微控制器（16/32位單片微控制器）
文件頁數(shù)： 42/88頁
文件大?。?/td> 614K
代理商： ΜPD703001
42
μ
PD703000, 703001
I
G
Mnemonic
Operand
SLD.B
SLD.H
SLD.W
LD.B
LD.H
LD.W
SST.B
SST.H
SST.W
ST.B
ST.H
ST.W
MOV
MOV
MOVHI
MOVEA
ADD
ADD
ADDI
SUB
SUBR
disp7[ep], reg2
disp8[ep], reg2
disp8[ep], reg2
disp16[reg1], reg2
disp16[reg1], reg2
disp16[reg1], reg2
reg2, disp7[ep]
reg2, disp8[ep]
reg2, disp8[ep]
reg2, disp16[reg1]
reg2, disp16[reg1]
reg2, disp16[reg1]
reg1, reg2
imm5, reg2
imm16, reg1, reg2
imm16, reg1, reg2
reg1, reg2
imm5, reg2
imm16, reg1, reg2
reg1, reg2
reg1, reg2
op Code
Flag
SAT
Z
S
OV
CY
Operation
adr
←
ep+zero-extend(disp7)
GR[reg2]
←
sign-extend(Load-memory(adr, Byte))
adr
←
ep+zero-extend(disp8)
GR[reg2]
←
sign-extend(Load-memory(adr, Halfword))
adr
←
ep+zero-extend(disp8)
GR[reg2]
←
Load-memory(adr, Word)
adr
←
GR[reg1]+sign-extend(disp16)
GR[reg2]
←
sign-extend(Load-memory(adr, Byte))
adr
←
GR[reg1]+sign-extend(disp16)
GR[reg2]
←
sign-extend(Load-memory(adr, Halfword))
adr
←
GR[reg1]+sign-extend(disp16)
GR[reg2]
←
Load-memory(adr, Word)
adr
←
ep+zero-extend(disp7)
Store-memory(adr, GR[reg2], Byte)
adr
←
ep+zero-extend(disp8)
Store-memory(adr, GR[reg2], Halfword)
adr
←
ep+zero-extend(disp8)
Store-memory(adr, GR[reg2], Word)
adr
←
GR[reg1]+sign-extend(disp16)
Store-memory(adr, GR[reg2], Byte)
adr
←
GR[reg1]+sign-extend(disp16)
Store-memory(adr, GR[reg2], Halfword)
adr
←
GR[reg1]+sign-extend(disp16)
Store-memory(adr, GR[reg2], Word)
GR[reg2]
←
GR[reg1]
GR[reg2]
←
sign-extend(imm5)
GR[reg2]
←
GR[reg1]+(imm16 || 0
16
)
GR[reg2]
←
GR[reg1]+sign-extend(imm16)
GR[reg2]
←
GR[reg2]+GR[reg1]
GR[reg2]
←
GR[reg2]+sign-extend(imm5)
GR[reg2]
←
GR[reg1]+sign-extend(imm16)
GR[reg2]
←
GR[reg2]–GR[reg1]
GR[reg2]
←
GR[reg1]–GR[reg2]
rrrrr0110ddddddd
rrrrr1000ddddddd
Note 1
rrrrr1010dddddd0
Note 2
rrrrr111000RRRRR
ddddddddddddddd
rrrrr111001RRRRR
ddddddddddddddd0
Note 3
rrrrr111001RRRRR
ddddddddddddddd1
Note 3
rrrrr0111ddddddd
rrrrr1001ddddddd
Note 1
rrrrr1010dddddd1
Note 2
rrrrr111010RRRRR
dddddddddddddddd
rrrrr111011RRRRR
ddddddddddddddd0
Note 3
rrrrr111011RRRRR
ddddddddddddddd1
Note 3
rrrrr000000RRRRR
rrrrr010000iiiii
rrrrr110010RRRRR
i i i i i i i i i i i i i i i i
rrrrr110001RRRRR
i i i i i i i i i i i i i i i i
rrrrr001110RRRRR
rrrrr010010iiiii
rrrrr110000RRRRR
i i i i i i i i i i i i i i i
rrrrr001101RRRRR
rrrrr001100RRRRR
A
Notes 1.
ddddddd = the higher 7-bit of disp8
2.
dddddd = the higher 6-bit of disp8
3.
ddddddddddddddd = the higher 15-bit of disp16
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
L
Instruction Set List
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