參數(shù)資料
型號(hào): μPD78013F
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8 Bit Single Chip Microcontrollers
中文描述: 8位單片機(jī)微控制器
文件頁(yè)數(shù): 45/74頁(yè)
文件大?。?/td> 567K
代理商: ΜPD78013F
45
μ
PD78011F, 78012F, 78013F, 78014F, 78015F, 78016F, 78018F
Parameter
Symbol
Test Conditions
MIN.
MAX.
Unit
ASTB high-level width
t
ASTH
0.5t
CY
ns
Address setup time
t
ADS
0.5t
CY
– 30
ns
Address hold time
t
ADH
50
ns
Data input time from address
t
ADD1
(2.5 + 2n) t
CY
– 50
ns
t
ADD2
(3 + 2n) t
CY
– 100
ns
Data input time from RD
t
RDD1
(1 + 2n) t
CY
– 25
ns
t
RDD2
(2.5 + 2n) t
CY
– 100
ns
Read data hold time
t
RDH
0
ns
RD low-level width
t
RDL1
(1.5 + 2n) t
CY
– 20
ns
t
RDL2
(2.5 + 2n) t
CY
– 20
ns
WAIT
input time from RD
t
RDWT1
0.5t
CY
ns
t
RDWT2
1.5t
CY
ns
WAIT
input time from WR
t
WRWT
0.5t
CY
ns
WAIT low-level width
t
WTL
(0.5 + 2n) t
CY
+ 10
(2 + 2n) t
CY
ns
Write data setup time
t
WDS
100
ns
Write data hold time
t
WDH
Load resistor
5 k
20
ns
WR low-level width
t
WRL1
(2.5 + 2n) t
CY
– 20
ns
RD
delay time from ASTB
t
ASTRD
0.5t
CY
– 30
ns
WR
delay time from ASTB
t
ASTWR
1.5t
CY
– 30
ns
ASTB
delay time from
RD
in external fetch
t
RDAST
t
CY
– 10
t
CY
+ 40
ns
Address hold time from
RD
in external fetch
t
RDADH
t
CY
t
CY
+ 50
ns
Write data output time from RD
t
RDWD
V
DD
= 4.5 to 5.5 V
0.5t
CY
+ 5
0.5t
CY
+ 30
ns
0.5t
CY
+ 15
0.5t
CY
+ 90
ns
Write data output time from WR
t
WRWD
V
DD
= 4.5 to 5.5 V
5
30
ns
15
90
ns
Address hold time from WR
t
WRADH
V
DD
= 4.5 to 5.5 V
t
CY
t
CY
+ 60
ns
t
CY
t
CY
+ 100
ns
RD
delay time from WAIT
t
WTRD
0.5t
CY
2.5t
CY
+ 80
ns
WR
delay time from WAIT
t
WTWR
0.5t
CY
2.5t
CY
+ 80
ns
(2) Read/Write Operation
(T
A
= –40 to +85
°
C, V
DD
= 2.7 to 5.5 V)
Remarks 1.
t
CY
= T
CY
/4
2.
n indicates number of waits.
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