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參數資料
| 型號： | μPD780306 |
| 廠商： | NEC Corp. |
| 英文描述： | 8 Bit Single Chip Microcontrollers(8位單片微控制器) |
| 中文描述： | 8位單片機微控制器（8位單片微控制器） |
| 文件頁數： | 39/70頁 |
| 文件大?。?/td> | 525K |
| 代理商： | ΜPD780306 |
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39
μ
PD780306, 780308
XT1
XT2
SUBSYSTEM CLOCK OSCILLATOR CHARACTERISTICS (T
A
= –40 to +85
°
C, V
DD
= 2.0
Note 4
to 5.5 V)
Notes 1.
Indicates only oscillation circuit characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after V
DD
has reached the minimum oscillation voltage range.
3.
After V
DD
reaches the minimum oscillator voltage range.
4.
Actually, oscillation start voltage or over, and V
DD
= 2.0 or over (For an external clock, V
DD
= 2.0 or over is
OK).
Cautions
1.
When using the subsystem clock oscillator, wiring in the area enclosed with the broken line should
be carried out as follows to avoid an adverse effect from wiring capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as V
SS
.
Do not ground it to the ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2.
The subsystem clock oscillation circuit is designed as a low amplification circuit to provide low
consumption current, causing misoperation to noise more frequently than the main system clock
oscillation circuit. Special care should therefore be taken to wiring method when the subsystem
clock is used.
V
DD
= 4.5 to 5.5 V
Note 3
Note 3
Crystal resonator
External clock
Oscillator frequency
(f
XT
)
Note 1
Oscillation stabilization
time
Note 2
XT1 input frequency
(f
XT
)
Note 1
XT1 input high-/low-level
width (t
XTH
/t
XTL
)
35
2
10
100
15
32.768
1.2
32
32
5
kHz
s
kHz
μ
s
Resonator
Recommended Circuit
Parameter
Test Conditions
MIN.
TYP.
MAX.
Unit
V
DD
= Oscillator
voltage range
R2
XT2
XT1
IC
C4
C3
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