
5
CHAPTER 1 OVERVIEW
Table 1-1. Function Overview of the
μ
PD78044F Subseries (1/2)
Product name
μ
PD78042F
μ
PD78043F
μ
PD78044F
μ
PD78045F
μ
PD78P048A
Item
Internal
memory
ROM
Masked ROM
One-time PROM/EPROM
16K bytes
24K bytes
32K bytes
40K bytes
60K bytes
Note 1
High-speed RAM
512 bytes
1024 bytes
1024 bytes
Note 2
Extended RAM
-
1024 bytes
Buffer RAM
64 bytes
FIP display RAM
48 bytes
General-purpose registers
8 bits x 8 x 4 banks
For main system clock
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s (at 5.0 MHz)
For subsystem clock
122
μ
s (at 32.768 kHz)
Instruction set
16-bit operations
Multiplication/division (8 bits x 8 bits, 16 bits/8 bits)
Bit (set, reset, test, Boolean operations)
BCD conversion, etc.
I/O ports (including those
Total
: 68 pins
multiplexed with FIP pins)
CMOS input
: 2 pins
CMOS I/O
: 27 pins
N-ch open-drain I/O
: 5 pins
P-ch open-drain I/O
: 16 pins
P-ch open-drain output : 18 pins
FIP controller/driver
Total
: 34 pins
Segments : 9 to 24 pins
Digits
: 2 to 16 pins
A/D converter
8-bit resolution x 8 channels
Power supply voltage: AV
DD
= 4.0 to 6.0 V
Serial interface
3-wire serial I/O, SBI, or 2-wire serial I/O mode selectable : 1 channel
3-wire serial I/O mode (with automatic transmission/
reception function of up to 64 bytes)
: 1 channel
Timer
16-bit timer/event counter: 1 channel
8-bit timer/event counter : 2 channels
Watch timer
: 1 channel
Watchdog timer
: 1 channel
6-bit up/down counter
: 1 channel
Timer outputs
3 (one for 14-bit PWM output)
Notes 1.
The memory size switching register (IMS) can be used to select 16K, 24K, 32K, 40K, or 60K
bytes.
2.
The IMS can be used to select 512K or 1024K bytes.
Minimum
instruction
execution time
*