參數(shù)資料
型號(hào): μPD78062(A)
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述: 8位單片機(jī)微控制器(8位單片微控制器)
文件頁(yè)數(shù): 47/68頁(yè)
文件大?。?/td> 539K
代理商: ΜPD78062(A)
47
μ
PD78062(A), 78063(A), 78064(A)
(iii) SBI mode (SCK0...Internal clock output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
V
DD
= 4.5 to 6.0 V
800
ns
3200
ns
V
DD
= 4.5 to 6.0 V
t
KCY3
/2–50
ns
t
KCY3
/2–150
ns
V
DD
= 4.5 to 6.0 V
100
ns
300
ns
R = 1 k
,
V
DD
= 4.5 to 6.0 V
0
250
ns
C = 100 pF
Note
0
1000
ns
t
KCY3
ns
t
KCY3
ns
t
KCY3
ns
t
KCY3
ns
SCK0 cycle time
SCK0 high/low-level
width
SB0, SB1 setup time (to
SCK0
)
SB0, SB1 hold time
(from SCK0
)
SB0, SB1 output delay
time from SCK0
SB0, SB1
from SCK0
SCK0
from SB0, SB1
SB0, SB1 high-level
width
SB0, SB1 low-level
width
t
KCY3
t
KH3
,
t
KL3
t
SIK3
t
KSI3
t
KSO3
t
KSB
t
SBK
t
SBH
t
SBL
t
KCY3
/2
ns
Note
R and C are the load resistance and load capacitance of the SCK0, SB0 and SB1 output line.
(iv) SBI mode (SCK0...External clock input)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
V
DD
= 4.5 to 6.0 V
800
ns
3200
ns
V
DD
= 4.5 to 6.0 V
400
ns
1600
ns
V
DD
= 4.5 to 6.0 V
100
ns
300
ns
R = 1 k
,
V
DD
= 4.5 to 6.0 V
0
300
ns
C = 100 pF
Note
0
1000
ns
t
KCY4
ns
t
KCY4
ns
t
KCY4
ns
t
KCY4
ns
1000
ns
t
KCY4
/2
ns
Note
R and C are the load resistance and load capacitance of the SB0 and SB1 output line.
t
KCY4
t
KH4
,
t
KL4
t
SIK4
t
KSI4
t
KSO4
t
KSB
t
SBK
t
SBH
t
SBL
t
R4
,
t
F4
SCK0 cycle time
SCK0 high/low-level
width
SB0, SB1 setup time (to
SCK0
)
SB0, SB1 hold time
(from SCK0
)
SB0, SB1 output delay
time from SCK0
SB0, SB1
from SCK0
SCK0
from SB0, SB1
SB0, SB1 high-level
width
SB0, SB1 low-level
width
SCK0 rise, fall time
相關(guān)PDF資料
PDF描述
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