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參數(shù)資料
| 型號： | μPD78F0034 |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 21/52頁 |
| 文件大?。?/td> | 393K |
| 代理商： | ΜPD78F0034 |
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μ
PD78F0034
Preliminary Data Sheet
21
Capacitance (T
A
= 25
°
C, V
DD
= V
SS
= 0 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Input
capacitance
C
IN
f = 1 MHz
Measured pins returned to 0 V.
15
pF
I/O
capacitance
C
IO
f = 1 MHz
Measured pins returned
to 0 V.
P00 to P03, P20 to P25,
P34 to P36, P40 to P47,
P50 to P57, P64 to P67,
P70 to P75,
15
pF
P30 to P33
20
pF
Remark
The characteristics of alternate-function pins and port pins are the same unless specified otherwise.
Main System Clock Oscillation Circuit Characteristics (T
A
= –40 to 85
°
C, V
DD
= 2.7 to 5.5 V)
Recommended
Circuit
TYP.
MAX.
8.38
5.0
4
8.38
5.0
10
30
8.38
5.0
500
500
Unit
MHz
ms
MHz
ms
MHz
ns
Resonator
Ceramic
resonator
Crystal
resonator
External
clock
Parameter
Oscillation
frequency (f
X
)
Note 1
Oscillation
stabilization time
Note 2
Oscillator
frequency (f
X
)
Note 1
Oscillation
stabilization time
Note 2
X1 input
frequency (f
X
)
Note 1
X1 input
high-/low-level width
(t
XH
, t
XL
)
MIN.
1.0
1.0
1.0
1.0
1.0
50
85
Test Conditions
V
DD
= 4.5 to 5.5 V
After V
DD
reaches oscil-
lator voltage range MIN.
V
DD
= 4.5 to 5.5 V
V
DD
= 4.5 to 5.5 V
V
DD
= 4.5 to 5.5 V
V
DD
= 4.5 to 5.5 V
Notes 1.
Indicates only oscillation circuit characteristics. Refer to
AC Characteristics
for instruction execution
time.
2.
Time required to stabilize oscillation after reset or STOP mode release.
Cautions 1. When using the main system clock oscillator, wiring in the area enclosed with the broken line
in the above figures should be carried out as follows to avoid an adverse effect from wiring
capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always keep the ground point of the oscillator to the same potential as V
SS1
.
Do not ground the capacitor to a ground pattern in which a high current flows.
Do not fetch signals from the oscillator.
2. When the main system clock is stopped and the system is operated by the subsystem clock,
the subsystem clock should be switched again to the main system clock after the oscillation
stabilization time is secured by the program.
X2
V
PP
X1
C1
C2
X2
V
PP
X1
C1
C2
X2
X1
PD74HCU04
μ
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