390
CHAPTER 16 INTERRUPT FUNCTIONS
16.4 Software Interrupt Acknowledgment Operations
A software interrupt is acknowledged in response to execution of a BRK or BRKCS instruction. Software interrupts cannot
be disabled.
16.4.1 BRK instruction software interrupt acknowledgment operation
When a BRK instruction is executed, the program status word (PSW), program counter (PC) are saved in that order to
the stack, the IE flag is cleared (0), the vector table (003EH/003FH) contents are loaded into the low-order 16 bits of the
PC, and 0000B into the high-order 4 bits, and a branch is performed (the start of the service program must be in the base
area).
The RETB instruction must be used to return from a BRK instruction software interrupt.
Caution The RETI instruction must not be used to return from a BRK instruction software interrupt.
16.4.2 BRKCS instruction software interrupt (software context switching) acknowledgment operation
The context switching function can be initiated by executing a BRKCS instruction.
The register bank to be used after context switching is specified by the BRKCS instruction operand.
When a BRKCS instruction is executed, the program branches to the start address of the interrupt service program (which
must be in the base area) stored beforehand in the specified register bank, and the contents of the program status word
(PSW) and program counter (PC) are saved in the register bank.
Figure 16-7. Context Switching Operation by Execution of a BRKCS Instruction
The RETCSB instruction is used to return from a software interrupt due to a BRKCS instruction. The RETCSB instruction
must specify the start address of the interrupt service program for the next time context switching is performed by a BRKCS
instruction. This interrupt service program start address must be in the base area.
Caution The RETCS instruction must not be used to return from a BRKCS instruction software interrupt.
Register Bank
(0 to 7)
A
B
R5
R7
X
C
R4
R6
D
H
VP
UP
E
L
V
U
T
W
Register Bank n (n = 0 to 7)
7 Transfer
3 Register Bank Switching
(RBS0-RBS2
←
n)
4 RSS
←
0
IE
←
0
1 Save
2 Save
(Bits 8 to 11 of
Temporary Register)
6 Exchange
5 Save
PC
15-0
PC
19-16
0000B
Temporary Register
PSW