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參數(shù)資料
| 型號： | 0ICAG-001-XTD |
| 元件分類： | 網(wǎng)絡接口 |
| 英文描述： | DATACOM, INTERFACE CIRCUIT, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 521K |
| 代理商： | 0ICAG-001-XTD |
AMIS-42673 High Speed CAN Transceiver
Data Sheet
For Long Networks
8.0 Electrical Characteristics
8.1 Definitions
All voltages are referenced to GND (pin 2). Positive currents flow into the IC. Sinking current means that the current is flowing into the
pin. Sourcing current means that the current is flowing out of the pin.
8.2 Absolute Maximum Ratings
Stresses above those listed in Table 4 may cause permanent device failure. Exposure to absolute maximum ratings for extended
periods may effect device reliability.
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min.
Max.
Unit
VCC
Supply voltage
-0.3
+7
V
V33
I/O interface voltage
-0.3
+7
V
VCANH
DC voltage at pin CANH
0 < VCC < 5.25V; no time limit
-45
+45
V
VCANL
DC voltage at pin CANL
0 < VCC < 5.25V; no time limit
-45
+45
V
VTxD
DC voltage at pin TxD
-0.3
VCC + 0.3
V
VRxD
DC voltage at pin RxD
-0.3
VCC + 0.3
V
VREF
DC voltage at pin VREF
-0.3
VCC + 0.3
V
Vtran(CANH)
Transient voltage at pin CANH
Note 1
-150
+150
V
Vtran(CANL)
Transient voltage at pin CANL
Note 1
-150
+150
V
Vtran(VREF)
Transient voltage at pin VREF
Note 1
-150
+150
Vesd(CANL/CANH)
Electrostatic discharge voltage at
CANH and CANL pin
Note 2
Note 5
-8
-500
+8
+500
kV
V
Vesd
Electrostatic discharge voltage at all
other pins
Note 3
Note 5
-4
-250
+ 4
+250
kV
V
Latch-up
Static latch-up at all pins
Note 4
100
mA
Tstg
Storage temperature
-55
+155
°C
Tamb
Ambient temperature
-40
+125
°C
Tjunc
Maximum junction temperature
-40
+150
°C
Notes:
1) Applied transient waveforms in accordance with “ISO 7637 part 3”, test pulses 1, 2, 3a, and 3b (see Figure 4).
2) Standardized human body model system ESD pulses in accordance to IEC 1000.4.2.
3) Standardized human body model ESD pulses in accordance to MIL883 method 3015. Supply pin 8 is
±4kV.
4) Static latch-up immunity: static latch-up protection level when tested according to EIA/JESD78.
5) Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3-1993.
8.3 Thermal Characteristics
Table 5: Thermal Characteristics
Symbol
Parameter
Conditions
Value
Unit
Rth(vj-a)
Thermal resistance from junction to ambient in SO8 package
In free air
145
K/W
Rth(vj-s)
Thermal resistance from junction to substrate of bare die
In free air
45
K/W
5
AMI Semiconductor – October 07, Rev. 1.0
www.amis.com
Specifications subject to change without notice
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