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參數(shù)資料
| 型號(hào)： | 100310 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Skew 2:8 Differential Clock Driver |
| 中文描述： | 低偏移2:8差分時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 63K |
| 代理商： | 100310 |
3
www.fairchildsemi.com
1
Commercial Version
(Continued)
AC Electrical Characteristics
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 4:
t
PS
describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair
’
s LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 5:
t
OSLH
describes in-phase gate-to-gate differential propagation skews with all differential outputs going LOW-to-HIGH; t
OSHL
describes the same con-
ditions except with the outputs going HIGH-to-LOW.
Note 6:
t
OST
describes the maximum worst case difference in any of the t
PS
, t
OSLH
or t
OST
delay paths combined.
Note 7:
The skew specifications pertain to differential I/O paths.
Symbol
Parameter
T
C
=
0
°
C
Typ
T
C
=
+
25
°
C
Typ
T
C
=
+
85
°
C
Typ
Units
Conditions
Min
Max
Min
Max
Min
Max
f
MAX
Max Toggle Frequency
CLKIN A/B to Q
n
750
575
750
575
750
575
MHz
MHz
SEL to Q
n
t
PLH
t
PHL
Propagation Delay,
CLKIN
n
to CLK
n
Differential
0.80
0.90
1.00
0.82
0.92
1.02
0.89
1.01
1.09
ns
Figure 3
Single-Ended
0.80
0.96
1.20
0.82
0.98
1.22
0.89
1.06
1.29
t
PLH
t
PHL
t
PS
t
OSLH
t
OSHL
t
OST
t
S
Propagation Delay,
SEL to Output
0.75
0.99
1.20
0.80
1.02
1.25
0.85
1.10
1.35
ns
Figure 2
LH-HL Skew
Gate-Gate Skew LH
Gate-Gate Skew HL
10
20
20
30
30
50
10
20
20
30
50
50
10
20
20
30
50
50
ps
(Note 4)(Note 7)
(Note 5)(Note 7)
(Note 5)(Note 7)
Gate-Gate LH-HL Skew
Setup Time
SEL to CLKIN
n
Setup Time
SEL to CLKIN
n
Transition Time
30
60
30
60
30
60
(Note 6)(Note 7)
300
300
300
ps
t
H
0
0
0
ps
t
TLH
t
THL
275
510
750
275
500
750
275
480
750
ps
Figure 4
20% to 80%, 80% to 20%
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PDF描述 |
|---|---|
| 100310QI | 6A,5V,Covered,AC100-240 |
| 100311QCX | Nine Distributed-Output Clock Driver |
| 100311QIX | Nine Distributed-Output Clock Driver |
| 100311 | Low Skew 1:9 Differential Clock Driver |
| 100311QC | Low Skew 1:9 Differential Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 1003-10 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:＂CL＇R BRAIDED HOSE PVC 3/8＂＂＂ |
| 100310 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 1003100000 | 制造商:Weidmuller 功能描述:CONN ENCLOSURE SIZE HQ |
| 10031023-102N | 功能描述:高速/模塊連接器 10031023-102N-POWER METRAL 5RX1M RoHS:否 制造商:Molex 系列:iPass 產(chǎn)品類(lèi)型: 排數(shù): 列數(shù): 位置/觸點(diǎn)數(shù)量:38 安裝角:Right 節(jié)距:0.8 mm 安裝風(fēng)格:Plug 端接類(lèi)型:SMD/SMT 外殼材料:Thermoplastic 觸點(diǎn)材料:High Performance Alloy (HPA) 觸點(diǎn)電鍍:Gold |
| 10031023-102NLF | 功能描述:高速/模塊連接器 10031023-102NLF-POWER METRAL 5RX1M RoHS:否 制造商:Molex 系列:iPass 產(chǎn)品類(lèi)型: 排數(shù): 列數(shù): 位置/觸點(diǎn)數(shù)量:38 安裝角:Right 節(jié)距:0.8 mm 安裝風(fēng)格:Plug 端接類(lèi)型:SMD/SMT 外殼材料:Thermoplastic 觸點(diǎn)材料:High Performance Alloy (HPA) 觸點(diǎn)電鍍:Gold |
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