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參數(shù)資料
| 型號： | 100310QI |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 6A,5V,Covered,AC100-240 |
| 中文描述： | 100K SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | 0.450 X 0.450 INCH, MO-047, PLASTIC, LCC-28 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 63K |
| 代理商： | 100310QI |
3
www.fairchildsemi.com
1
Commercial Version
(Continued)
AC Electrical Characteristics
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 4:
t
PS
describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair
’
s LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 5:
t
OSLH
describes in-phase gate-to-gate differential propagation skews with all differential outputs going LOW-to-HIGH; t
OSHL
describes the same con-
ditions except with the outputs going HIGH-to-LOW.
Note 6:
t
OST
describes the maximum worst case difference in any of the t
PS
, t
OSLH
or t
OST
delay paths combined.
Note 7:
The skew specifications pertain to differential I/O paths.
Symbol
Parameter
T
C
=
0
°
C
Typ
T
C
=
+
25
°
C
Typ
T
C
=
+
85
°
C
Typ
Units
Conditions
Min
Max
Min
Max
Min
Max
f
MAX
Max Toggle Frequency
CLKIN A/B to Q
n
750
575
750
575
750
575
MHz
MHz
SEL to Q
n
t
PLH
t
PHL
Propagation Delay,
CLKIN
n
to CLK
n
Differential
0.80
0.90
1.00
0.82
0.92
1.02
0.89
1.01
1.09
ns
Figure 3
Single-Ended
0.80
0.96
1.20
0.82
0.98
1.22
0.89
1.06
1.29
t
PLH
t
PHL
t
PS
t
OSLH
t
OSHL
t
OST
t
S
Propagation Delay,
SEL to Output
0.75
0.99
1.20
0.80
1.02
1.25
0.85
1.10
1.35
ns
Figure 2
LH-HL Skew
Gate-Gate Skew LH
Gate-Gate Skew HL
10
20
20
30
30
50
10
20
20
30
50
50
10
20
20
30
50
50
ps
(Note 4)(Note 7)
(Note 5)(Note 7)
(Note 5)(Note 7)
Gate-Gate LH-HL Skew
Setup Time
SEL to CLKIN
n
Setup Time
SEL to CLKIN
n
Transition Time
30
60
30
60
30
60
(Note 6)(Note 7)
300
300
300
ps
t
H
0
0
0
ps
t
TLH
t
THL
275
510
750
275
500
750
275
480
750
ps
Figure 4
20% to 80%, 80% to 20%
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 100311QCX | Nine Distributed-Output Clock Driver |
| 100311QIX | Nine Distributed-Output Clock Driver |
| 100311 | Low Skew 1:9 Differential Clock Driver |
| 100311QC | Low Skew 1:9 Differential Clock Driver |
| 100311QI | Low Skew 1:9 Differential Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 100310QIX | 功能描述:時鐘驅(qū)動器及分配 2:8 Diff Clock Drv RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 100311 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Skew 1:9 Differential Clock Driver |
| 100311_YAC3026T WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 1003110000 | 制造商:Weidmuller 功能描述:CONN ENCLOSURE SIZE HQ |
| 100311020 | 制造商:ROSE+BOPLA (Pheonix Meanco) 功能描述:BRACKETS EXT 02 SERIES |
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