參數(shù)資料
型號： 100311QIX
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 時鐘及定時
英文描述： Nine Distributed-Output Clock Driver
中文描述： 100K SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
封裝： 0.450 X 0.450 INCH, MO-047, PLASTIC, LCC-28
文件頁數(shù)： 4/6頁
文件大小： 64K
代理商： 100311QIX
www.fairchildsemi.com
4
1
Industrial Version
(Continued)
DC Electrical Characteristics
(Note 9)
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 9:
The specified limits represent the
“
worst case
”
value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under
“
worst case
”
conditions.
AC Electrical Characteristics
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 10:
f
MAX
=
the highest frequency of which output V
OL
/V
OH
levels still meet V
IN
specifications. The F311 will function @ 1 GHz
Note 11:
t
PS
describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair's LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 12:
t
OSLH
describes in-phase gate differential propagation skews with all differential outputs going LOW-to-HIGH; t
OSHL
describes the same conditions
except with the outputs going HIGH-to-LOW.
Note 13:
t
OST
describes the maximum worst case difference in any of the t
PS
, t
OSLH
or t
OST
delay paths combined.
Note 14:
The skew specifications pertain to differential I/O paths.
Symbol
Parameter
T
C
=
40
°
C
Min
1830
T
C
=
0
°
C to
+
85
°
C
Min
1830
Units
Conditions
Max
1480
Max
1475
V
IL
Input LOW Voltage
mV
Guaranteed LOW Signal for
All Inputs
V
IN
=
V
IL
(Min)
V
IN
=
V
IH
(Max)
I
IL
I
IH
Input LOW Current
Input HIGH Current
CLKIN, CLKIN
0.50
0.50
μ
A
100
100
μ
A
EN
250
250
I
CBO
I
EE
V
PP
V
CMR
Input Leakage Current
Power Supply Current
10
115
150
V
CC
2.0
10
115
150
V
CC
2.0
μ
A
mA
V
IN
=
V
EE
Inputs Open
57
57
Minimum Input Swing
Common Mode Range
mV
V
V
CC
0.5
V
CC
0.5
Symbol
Parameter
T
C
=
40
°
C
Typ
T
C
=
+
25
°
C
Typ
T
C
=
+
85
°
C
Typ
Units
Conditions
Min
750
Max
Min
750
Max
Min
750
Max
f
MAX
Max Toggle Frequency
CLKIN to Q
n
Propagation Delay,
CLKIN
n
to CLK
n
Differential
MHz
(Note 10)
t
PLH
t
PHL
0.72
0.81
0.92
0.77
0.86
0.95
0.84
0.93
1.04
ns
Figure 3
Single-Ended
Propagation Delay
SEL to Output
0.62
0.70
0.89
0.97
1.02
1.20
0.67
0.80
0.93
1.05
1.17
1.25
0.74
0.85
1.06
1.12
1.24
1.35
t
PLH
t
PHL
t
PS
t
OSLH
t
OSHL
t
OST
t
S
ns
Figure 2
LH
–
HL Skew
Gate
–
Gate Skew LH
Gate
–
Gate Skew HL
10
20
20
30
50
50
10
20
20
30
50
50
10
20
20
30
50
50
(Note 11)(Note 14)
(Note 12)(Note 14)
(Note 12)(Note 14)
ps
Gate
–
Gate LH
–
HL Skew
Setup Time
EN
n
to CLKIN
n
Hold Time
EN
n
to CLKIN
n
Release Time
30
60
30
60
30
60
(Note 13)(Note 14)
250
250
300
ps
t
H
0
0
0
ps
t
R
300
300
300
ps
EN
n
to CLKIN
n
Transition Time
20% to 80%, 80% to 20%
t
TLH
t
THL
275
500
750
275
480
750
275
460
750
ps
Figure 4
相關(guān)PDF資料
PDF描述
100311 Low Skew 1:9 Differential Clock Driver
100311QC Low Skew 1:9 Differential Clock Driver
100311QI Low Skew 1:9 Differential Clock Driver
100313 Low Power Quad Driver
100313D Low Power Quad Driver
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