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參數(shù)資料
| 型號： | 100315 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Skew Quad Clock Driver |
| 中文描述： | 低偏移四路時鐘驅(qū)動器 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 82K |
| 代理商： | 100315 |
DC Electrical Characteristics
(Continued)
Note 5:
Screen tested 100% on each device at 55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8.
Note 6:
Sample tested (Method 5005, Table I) on each manufactured lot at 55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8.
Note 7:
Guaranteed by applying specified input condition and testing V
OH
/V
OL
.
AC Electrical Characteristics
V
EE
= 4.2V to 5.7V, V
CC
= V
CCA
= GND
Symbol
Parameter
T
C
= 55C
Min
0.58
T
C
= +25C
Min
0.63
T
C
= +125C
Min
0.72
Units
Conditions
Notes
Max
0.88
Max
0.88
Max
1.02
t
PLH
t
PHL
t
PLH
t
PHL
t
S G–G
t
TLH
t
THL
Propagation Delay CLKIN,
CLKIN to CLK
(1–4)
, CLK
(1–4)
Propagation Delay, TCLK
to CLK
(1–4)
, CLK
(1–4)
Skew Gate to Gate (Note 12)
Transition Time
20% to 80%, 80% to 20%
ns
Figures 1, 2
(Notes 8, 9,
10)
0.30
1.60
0.30
1.50
0.40
1.70
ns
120
0.90
100
0.85
120
0.85
ps
ns
(Note 10)
0.30
0.25
0.20
Note 8:
F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals 55C, then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 9:
Screen tested 100% on each device at +25C temperature only, Subgroup A9.
Note 10:
Sample tested (Method 5005, Table I) on each manufactured lot at +25C, Subgroup A9, and at +125C and 55C temperatures, Subgroups A10 and A11.
Note 11:
Not tested at +25C, +125C and 55C temperature (design characterization data).
Note 12:
Maximum output skew for any one device.
DS100319-3
Note 13:
Shown for testing CLKIN to CLK1 in the differential mode.
Note 14:
L1, L2, L3 and L4 = equal length 50
impedance lines.
Note 15:
All unused inputs and outputs are loaded with 50
in parallel with
≤
3 pF to GND.
Note 16:
Scope should have 50
input terminator internally.
FIGURE 1. AC Test Circuit
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