參數(shù)資料
型號: 100344QIX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 8-Bit D-Type Latch
中文描述: 100K SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC28
封裝: 0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28
文件頁數(shù): 1/8頁
文件大小: 170K
代理商: 100344QIX
100344
Low Power 8-Bit Latch with Cut-Off Drivers
General Description
The 100344 contains eight D-type latches, individual inputs
(D
), outputs (Q
), a common enable pin (E), latch enable
(LE), and output enable pin (OEN). A Q output follows its D
input when both E and LE are LOW. When either E or LE (or
both) are HIGH, a latch stores the last valid data present on
its D input prior to E or LE going HIGH.
A HIGH on OEN holds the outputs in a cut-off state. The
cut-off state is designed to be more negative than a normal
ECL LOW level. This allows the output emitter-followers to
turn off when the termination supply is 2.0V, presenting a
high impedance to the data bus. This high impedance re-
duces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100344 outputs are designed to drive a doubly termi-
nated 50
transmission line (25
load impedance). All in-
puts have 50 k
pull-down resistors.
Features
n
Cut-off drivers
n
Drives 25
load
n
Low power operation
n
2000V ESD protection
n
Voltage compensated operating range = 4.2V to 5.7V
n
Available to MIL-STD-883
Logic Symbol
Pin Names
D
0
–D
7
E
LE
OEN
Q
0
–Q
7
Description
Data Inputs
Enable Input
Latch Enable Input
Output Enable Input
Data Outputs
Connection Diagrams
DS100317-4
24-Pin DIP
DS100317-1
24-Pin Quad Cerpak
DS100317-2
August 1998
1
1998 National Semiconductor Corporation
DS100317
www.national.com
相關(guān)PDF資料
PDF描述
100350PC Low Power Hex D-Type Latch
100350 Low Power Hex D-Type Latch
100350QCX 6-Bit D-Type Latch
100350QC Low Power Hex D-Type Latch
100351 Low Power Hex D Flip-Flop
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