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| 型號： | 10H20EV8-4F |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLD |
| 英文描述： | CAP 0.8PF 25V +/-0.1PF THIN-FILM SN90/PB10/NI 30PPM TR-7-PA |
| 中文描述： | OT PLD, 4.7 ns, CDIP24 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-24 |
| 文件頁數(shù)： | 17/17頁 |
| 文件大?。?/td> | 140K |
| 代理商： | 10H20EV8-4F |
Philips Semiconductors Programmable Logic Devices
Product specification
10H20EV8/10020EV8
ECL programmable array logic
October 22, 1993
121
AC TEST CIRCUIT
PULSE
GENERATOR
SCOPE
RT
L1
L3
VCC
VCO1
VCO2
VEE
SCOPE
L2
RT
CL
I1
I11
CLK/I12
FM
FN
FX
FY
DUT
+2.0V + 0.010V
–2.5V + 0.010V FOR 10020EV8
–3.2V + 0.010V FOR 10H20EV8
25
F
0.01
F
NOTES:
1. Use decoupling capacitors of 0.1
F and 25F from GND to VCC, and 0.01F and 25F from GND to VEE (0.01 and 0.1F capacitors
should be NPO Ceramic or MLC type). Decoupling capacitors should be placed as close as physically possible to the DUT and lead
length should be kept to less than 1/4 inch (6mm).
2. All unused inputs should be connected to either HIGH or LOW state consistent with the LOGIC function required.
3. All unused outputs are loaded with 50
to GND.
4. L1 and L2 are equal length 50 impedance lines. L3, the distance from the DUT pin to the junction of the cable from the Pulse
Generator and the cable to the Scope, should not exceed 1/4 inch (6mm).
5. RT = 50 terminator internal to Scope.
6. The unmatched wire stub between coaxial cable and pins under test must be less than 1/4 inch (6mm) long for proper test.
7. CL = Fixture and stray capacitance ≤ 3pF.
8. Any unterminated stubs connected anywhere along the transmission line between the Pulse Generator and the DUT or between the
DUT and the Scope should not exceed 1/4 inch (6mm) in length (refer to section on AC setup procedure).
9. All 50
resistors should have tolerance of ± 1% or better.
10. Test procedures are shown for only one input or set of input conditions. Other inputs are tested in the same manner.
25
F
0.1
F
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