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參數(shù)資料
| 型號(hào)： | 1B21AN |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 140K |
| 描述： | IC CONV V TO I HYBRID 38-DIP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 電壓和電流控制器 |
| 全量程： | ±50ppm/°C |
| 線性： | ±0.02% |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 38-DIP（0.500"，12.70mm），8 引線 |
| 供應(yīng)商設(shè)備封裝： | 8-DIP |
| 包裝： | 管件 |
1B21
Rev. C | Page 6 of 8
TC Considerations of External Resistors
The specifications for gain and offset temperature coefficient
(TC) for the IB21 excluded the effects of external components.
The total gain TC for the circuit in Figure 4 is
Gain TC = 1B21 Gain TC + (Tracking TC of R
F
and R
I
)
The offset TC is also affected by the thermal stability of the
internal voltage reference and its contribution is
Ref TC = (VREF)(RF/RO)(4 mA/V)(TC of VREF +
Tracking TC of RF and RO)/1 ?10
6
Total Offset TC = 1B21 Offset TC + Ref TC
Specifically using RF, RI and RO from Case 3 in Table 2, with
absolute TCs of ?5 ppm/癈
Gain TC = 50 + (25 + 25) = 100 ppm/癈
Offset TC = 300 + (6.225 V)(20k/124.3 k)(4 mA/V)
(20 + 25 + 25)/1 ?10
6
= ?80 nA/癈
Similarly, when using a resistor network with a tracking spec
of ? ppm/癈, the total gain TC is ?5 ppm/癈 and the total
offset TC is ?00 nA/癈.
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