參數(shù)資料
型號： 20-101-0525
廠商： Rabbit Semiconductor
文件頁數(shù)： 71/142頁
文件大?。?/td> 0K
描述： COMPUTER SINGLE-BOARD LP3500 FOX
標準包裝： 1
系列： SBC LP3500
模塊/板類型： 單板計算機模塊
適用于相關產(chǎn)品： LP3500
其它名稱： 316-1115
28
Fox (LP3500)
3.4.3 Serial Interface Port
3.4.4 Programming Port
The LP3500’s serial programming port is accessed using header J5. The programming
port uses the Rabbit 3000’s Serial Port A for communication. Dynamic C uses the pro-
gramming port to download and debug programs.
The programming port is also used for the following operations.
Cold-boot the Rabbit 3000 on the LP3500 after a reset.
Remotely download and debug a program over an Ethernet connection using the
RabbitLink EG2110.
Fast copy designated portions of flash memory from one Rabbit-based board (the
master) to another (the slave) using the Rabbit Cloning Board.
In addition to Serial Port A, the Rabbit 3000 startup-mode (SMODE0, SMODE1), status,
and reset pins are available on the programming port.
The two startup mode pins determine what happens after a reset—the Rabbit 3000 is
either cold-booted or the program begins executing at address 0x0000.
The status pin is used by Dynamic C to determine whether a Rabbit microprocessor is
present. The status output has three different programmable functions:
1. It can be driven low on the first op code fetch cycle.
2. It can be driven low during an interrupt acknowledge cycle.
3. It can also serve as a general-purpose CMOS output.
The /RESET_IN pin is an external input that is used to reset the Rabbit 3000 and the
LP3500 onboard peripheral circuits. The serial programming port can be used to force a
hard reset on the LP3500 by asserting the /RESET_IN signal.
The LP3500 offers a serial interface port at header
J6, a 2 mm 2 × 5 socket. This port may be used to
connect serial logic-level devices such as Rabbit’s
SF1000 serial flash expansion cards to Serial Port
D on the Rabbit 3000. The PIO_0, PIO_1, PIO_2,
and PF2_SRST signals are not used by the SF1000
serial flash expansion cards.
Figure 14 provides the pinout for the serial interface
port.
Figure 14. Serial Interface Port
(Header J6) Pinout
PF2_SRST
PB7_SFCS
PC0_STX
Vcc
GND
PIO_2
PIO_1
PIO_0
PF0_SCK
PC1_SRX
J6
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