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參數(shù)資料
| 型號(hào)： | 2184LPSTJ |
| 英文描述： | Interface IC |
| 中文描述： | 接口IC |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大?。?/td> | 89K |
| 代理商： | 2184LPSTJ |
2
Troubleshooting Micro Power Off Mode on élan
TM
SC300/élanSC310 Microcontrollers and Evaluation Boards
like completely turning off the power to the system
while maintaining real-time clock operation and CMOS
contents. The system enters Micro Power Off mode
immediately when IORESET is sampled Low." Also on
page 1-40 are more details and software information
concerning the difference between power-up cold boot
and exiting Micro Power Off mode.
Table 5-2 on page 5-3 of the programmer’s reference
manual lists the mandatory configuration bit settings
that must be written soon after reset. See pages 5-10
and 5-11 for a list of registers related to controlling
power management functions.
CRYSTAL AND PLL START-UP
Here are a few considerations when analyzing
problems with power-on startup or getting the
élanSC300 microcontroller to wake up from Micro
Power Off mode.
I
If everything is working correctly, the élanSC300
microcontroller should not take more than one
second to power up. Refer to the élanSC300
microcontroller data sheet timing specifications in
Table 51 on page 99 and Figure 32 on page 100.
These specifications show t
1
= 1 s, typical (0.5 s for
the crystal to stabilize + 0.25 s for the PLLs to
stabilize + 0.25 s system-design margin). The VCC
power-on sequence shown in the footnotes at the
bottom of Table 51 must also be met in addition to
the other timing specifications.
I
Refer to the crystal specifications on pages 95 and
96 in the élanSC300 microcontroller data sheet and
pay special attention to the component value limits
listed in Table 49. The values of C
D
and C
G
must be
kept within the recommended limits to ensure a
reasonable start-up time for the oscillator circuit.
I
Refer to Appendix C in the élanSC300
Microcontroller Evaluation Board User’s Manual
for
board layout suggestions.
I
Refer to the Loop Filters section on page 97 in the
élanSC300 microcontroller data sheet and make
sure that you program the Clock Control Register
(Index 8Fh) to the recommended value of 256 ms or
greater. The value programmed into this register
determines the pulse width of the RSTDRV signal
when exiting Micro Power Off mode. This allows at
least 200 ms for the PLLs to start up when they
have been powered down.
A voltage level between 1 V and 2 V on the LF1–
LF4 pins indicates that the PLLs are powered up. All
four PLLs should power up with approximately the
same timing and this should occur within 200 ms
after VCC power is applied and the crystal has sta-
bilized. RSTDRV (a High True output from the mi-
crocontroller) should go False when RESIN and
IORESET are False and the PLLs are stable, and
then should allow the CPU to begin executing in-
structions.
I
The PLLs have a divide chain from which the clocks
are built. See page 51 of the élanSC300
microcontroller data sheet. Check to see if one of
the PLLs is not powering up. Each of the four LF1–
LF4 pins is associated with one of the PLLs:
– LF1 is the high-speed PLL.
– LF2 is the intermediate PLL.
– LF3 is the low-speed PLL.
– LF4 is the video PLL.
If either the low-speed or intermediate PLL (the ear-
lier ones in the chain) does not power up, the
high-speed and video PLLs (the last ones in the
chain) are prevented from powering up. If the inter-
mediate PLL does not power up, then it will prevent
all other PLLs from powering up.
I
You can also check the voltage levels of LF1–LF4 to
determine if the microcontroller is in the desired
PMM mode. When one of the LF1–LF4 pins
reaches its normal voltage level, does it stay stable
or decay again Not staying stable (High) indicates
that the PLL has turned back off as a result of the
microcontroller changing PMM modes. You can
also program PGP0–PGP3 to automatically
indicate when changes occur to or from different
PMM modes.
I
When exiting Micro Power Off mode, the
specification for VCC High to IORESET High delay
time (see t
5
in Figure 33 on page 100 of the
élanSC300 microcontroller data sheet) shows 5-
μ
s
minimum. However, this may not allow enough time
if the PLLs need more time to power up. The
élanSC300 microcontroller evaluation board uses
an RC circuit (1-M
series resistor with a 1-
μ
F cap
to ground) that provides approximately 450 ms of
delay between VSYS and RSTDRV High and
IORESET deassertion. This RC circuit is shown on
page D-20 (schematic sheet #19) of the
élan
TM
SC300 Microcontroller Evaluation Board
User’s Manual
. You may also want to increase the
RC time delay to the 450-ms value used on the
evaluation board. On the other hand, if the PLLs are
not powered up to their normal levels by the time the
RSTDRV goes back Low, you may need to
decrease this (t
5
) RC delay or increase the PLL
start-up time value in the Clock Control Register
(Index 8Fh), which can be programmed for
up to 1 s.
I
Measure the start-up times of the 32-kHz crystal
and the LF1–LF4 relative to the VCC, RESIN,
IORESET, and RSTDRV signals to determine
where the problem in power-on sequence is
occurring. If everything mentioned previously is
working correctly, you should see ROMCS access
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相關(guān)代理商/技術(shù)參數(shù) |
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| 218-4LPSTJ | 制造商:CTS Corporation 功能描述:Switch DIP ON OFF SPST 4 Recessed Slide 0.025A 24VDC J-Bend 1.27mm SMD Tube 制造商:CTS Corporation 功能描述:Switch DIP ON OFF SPST 4 Recessed Slide 0.025A 24VDC J-Bend 1000Cycle 1.27mm SMD Tube 制造商:CTS Corporation 功能描述:218 Series SPST 4 Position Auto Placeable Half Pitch Surface Mount DIP Switch 制造商:CTS 功能描述:Switch DIP ON OFF SPST 4 Recessed Slide 0.025A 24VDC J-Bend 1.27mm SMD Tube |
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| 2184LPSTJR | 制造商:CTS Corporation 功能描述:DIP SW HALF PITCH SMT 4SW, SPST, J-BEND, REEL - Tape and Reel |
| 218-4LPSTJR | 制造商:CTS Corporation 功能描述:DIP SW HALF PITCH SMT 4SW, SPST, J-BEND, REEL - Tape and Reel |
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