參數(shù)資料
型號： 24AA128ISM
廠商： Microchip Technology Inc.
元件分類： EEPROM
英文描述： The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述： 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS
文件頁數(shù)： 3/12頁
文件大?。?/td> 185K
代理商： 24AA128ISM
1998 Microchip Technology Inc.
DS21191B-page 3
24AA128/24LC128
TABLE 1-3
AC CHARACTERISTICS
All parameters apply across the spec-
ified operating ranges unless other-
wise noted.
Industrial (I):
Automotive (E): V
CC
= +4.5V to 5.5V
V
CC
= +1.8V to 5.5V
Tamb = -40
°
C to +85
°
C
Tamb = -40
°
C to 125
°
C
Parameter
Symbol
Min
Max
Units
Conditions
Clock frequency
F
CLK
—
—
—
100
100
400
—
—
—
—
—
—
1000
1000
300
300
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
3500
900
—
—
—
250
kHz
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
(Note 1)
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
(Note 2)
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V (E Temp range)
1.8V
≤
V
CC
≤
2.5V
2.5V
≤
V
CC
≤
5.5V
C
B
≤
100 pF (Note 1)
Clock high time
T
HIGH
4000
4000
600
4700
4700
1300
—
—
—
—
4000
4000
600
4700
4700
600
0
250
250
100
4000
4000
600
4000
4000
600
4700
4700
1300
—
—
—
4700
4700
1300
10
ns
Clock low time
T
LOW
ns
SDA and SCL rise time
(Note 1)
T
R
ns
SDA and SCL fall time
START condition hold time
T
F
ns
ns
T
HD
:
STA
START condition setup time
T
SU
:
STA
ns
Data input hold time
Data input setup time
T
HD
:
DAT
T
SU
:
DAT
ns
ns
STOP condition setup time
T
SU
:
STO
ns
WP setup time
T
SU
:
WP
ns
WP hold time
T
HD
:
WP
ns
Output valid from clock
(Note 2)
T
AA
ns
Bus free time: Time the bus must be
free before a new transmission can
start
Output fall time from V
IH
minimum to V
IL
maximum
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
T
BUF
ns
T
OF
ns
T
SP
—
50
ns
(Notes 1 and 3)
T
WC
—
5
ms
Endurance
Note 1:
1M
—
cycles
25
°
C, V
CC
= 5.0V, Block Mode (Note 4)
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please
consult the Total Endurance Model which can be obtained on Microchip’s BBS or website.
2:
3:
4:
相關(guān)PDF資料
PDF描述
24AA128ISN The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
24AA128IST The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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相關(guān)代理商/技術(shù)參數(shù)
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24AA128SC/W15K 制造商:Microchip Technology Inc 功能描述:128K I2C SMARTCARD EE WAFER - Gel-pak, waffle pack, wafer, diced wafer on film
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