參數(shù)資料
型號: 24AA128IST
廠商: Microchip Technology Inc.
元件分類: EEPROM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁數(shù): 8/12頁
文件大小: 185K
代理商: 24AA128IST
24AA128/24LC128
DS21191B-page 8
1998 Microchip Technology Inc.
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput.) Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition, followed by the control byte
for a write command (R/W = 0). If the device is still busy
with the write cycle, then no ACK will be returned. If no
ACK is returned, then the start bit and control byte must
be resent. If the cycle is complete, then the device will
return the ACK, and the master can then proceed with
the next read or write command. See Figure 7-1 for
flow diagram.
FIGURE 7-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)
Next
Operation
NO
YES
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