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參數(shù)資料
| 型號： | 24AA256T-EMC |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | I2C⑩ Serial EEPROM Family Data Sheet |
| 中文描述： | ⑩的I2C串行EEPROM系列數(shù)據(jù)手冊 |
| 文件頁數(shù)： | 16/42頁 |
| 文件大小： | 540K |
| 代理商： | 24AA256T-EMC |
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24AAXX/24LCXX/24FCXX
DS21930B-page 16
2007 Microchip Technology Inc.
6.0
WRITE OPERATIONS
6.1
Byte Write
A byte write operation begins with a Start condition
from the master followed by the four-bit control code
(see Figure 6-1 and Figure 6-2). The next 3 bits are
either the Block Address bits (for devices without
address pins) or the Chip Select bits (for devices with
address pins). Then the master transmitter clocks the
R/W bit (which is a logic low) onto the bus. The slave
then generates an Acknowledge bit during the ninth
clock cycle.
The next byte transmitted by the master is the address
byte (for 128-bit to 16 Kbit devices) or the high-order
address byte (for 32-512 Kbit devices). For 32 through
512 Kbit devices, the high-order address byte is
followed by the low-order address byte. In either case,
each address byte is acknowledged by the 24XX and
the address bits are latched into the internal address
counter of the 24XX.
For the 24XX00 devices, only the lower four address
bits are used by the device. The upper four bits are
“don’t cares.”
After receiving the ACK from the 24XX acknowledging
the final address byte, the master device transmits the
data word to be written into the addressed memory
location. The 24XX acknowledges again and the
master generates a Stop condition, which initiates the
internal write cycle.
If an attempt is made to write to an array with the WP
pin held high, the device will acknowledge the
command, but no write cycle will occur, no data will be
written, and the device will immediately accept a new
command. After a byte Write command, the internal
address counter will increment to the next address
location. During a write cycle, the 24XX will not
acknowledge commands.
FIGURE 6-1:
BYTE WRITE: 128-BIT TO 16 KBIT DEVICES
FIGURE 6-2:
BYTE WRITE: 32 TO 512 KBIT DEVICES
S
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte
Address
Byte
Data
Byte
A
C
K
A
C
K
A
C
K
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
Control
Byte
High Order
Address Byte
Low Order
Address Byte
Data
Byte
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
S
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24AA256T-EMF | I2C⑩ Serial EEPROM Family Data Sheet |
| 24AA256T-EMS | I2C⑩ Serial EEPROM Family Data Sheet |
| 24AA256T-EOT | I2C⑩ Serial EEPROM Family Data Sheet |
| 24AA256T-EP | I2C⑩ Serial EEPROM Family Data Sheet |
| 24AA256T-ESM | I2C⑩ Serial EEPROM Family Data Sheet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24AA256T-I/CS16K | 功能描述:電可擦除可編程只讀存儲器 256K 32K X 8 1.8V SER EE IND RoHS:否 制造商:Intersil 存儲容量: 組織: 數(shù)據(jù)保留: 最大時鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| 24AA256T-I/MF | 功能描述:電可擦除可編程只讀存儲器 256K 32K X 8 1.8V SER EE IND RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24AA256T-I/MNY | 功能描述:電可擦除可編程只讀存儲器 256K, 32Kx8, 1.8V SER EE, ExT RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24AA256T-I/MS | 功能描述:電可擦除可編程只讀存儲器 32kx8 - 1.8V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24AA256T-I/MSG | 功能描述:電可擦除可編程只讀存儲器 32kx8 - 1.8V Lead Free Package RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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