參數(shù)資料
型號(hào): 24AA256T-ESM
廠商: Microchip Technology Inc.
英文描述: I2C⑩ Serial EEPROM Family Data Sheet
中文描述: ⑩的I2C串行EEPROM系列數(shù)據(jù)手冊
文件頁數(shù): 11/42頁
文件大小: 540K
代理商: 24AA256T-ESM
2007 Microchip Technology Inc.
DS21930B-page 11
24AAXX/24LCXX/24FCXX
5.0
BUS CHARACTERISTICS
The following
bus protocol
has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 5-1).
5.1
Bus Not Busy (A)
Both data and clock lines remain high.
5.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
5.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
5.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between Start and Stop conditions is
determined by the master device.
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