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參數(shù)資料
| 型號(hào)： | 24C02A |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 2K 5.0V CMOS serial EEPROMs(2K位,5.0V,IIC串行EEPROM) |
| 中文描述： | 2K 5.0V的CMOS串行EEPROM（2K位和5.0V，國(guó)際進(jìn)口串行EEPROM的） |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 115K |
| 代理商： | 24C02A |
24C01A/02A/04A
DS11183C-page 4
1995 Microchip Technology Inc.
2.0
FUNCTIONAL DESCRIPTION
The 24C01A/02A/04A supports a bidirectional two wire
bus and data transmission protocol. A device that
sends data onto the bus is defined as transmitter, and
a device receiving data as receiver. The bus has to be
controlled by a master device which generates the
serial clock (SCL), controls the bus access, and gener-
ates the START and STOP conditions, while the
24C01A/02A/04A works as slave. Both master and
slave can operate as transmitter or receiver but the
master device determines which mode is activated.
Up to eight 24C01/24c02s can be connected to the bus,
selected by the A0, A1 and A2 chip address inputs. Up
to four 24C04As can be connected to the bus, selected
by A1 and A2 chip address inputs. A0 must be tied to
V
CC
or V
SS
for the 24C04A. Other devices can be con-
nected to the bus but require different device codes
than the 24C01A/02A/04A (refer to section Slave
Address).
3.0
BUS CHARACTERISTICS
The following
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (see Figure 3-1).
bus protocol
has been defined:
3.1
Bus not Busy (A)
Both data and clock lines remain HIGH.
3.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition.
All commands must be preceded by a START condi-
tion.
3.3
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
3.4
Data Valid (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited.
3.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line HIGH to enable
the master to generate the STOP condition.
Note:
The 24C01A/02A/04A does not generate
any acknowledge bits if an internal pro-
gramming cycle is in progress.
FIGURE 3-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
SCL
SDA
(A)
(B)
(D)
(D)
(C)
(A)
START CONDITION
ADDRESS
OR
ACKNOWLEDGE
VALID
DATA ALLOWED
TO CHANGE
STOP
CONDITION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24C02C | 2K 5.0V IIC serial EEPROMs(2K位，1M次擦寫周期，硬件寫保護(hù)，二線串行接口,EEPROM) |
| 24C02C-EP | 2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C02C-ESN | 2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C02C-EST | 2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C02C-IP | 2K 5.0V I 2 C ⑩ Serial EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24C02A/J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24C02A/P | 制造商:Microchip Technology Inc 功能描述:Serial EEPROM, 256 x 8, 8 Pin, Plastic, DIP |
| 24C02A/SM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24C02A/SN | 制造商:MICROCHIP TECH 功能描述:Serial EEPROM, 256 x 8, 8 Pin, Plastic, SOP 制造商:Microchip Technology Inc 功能描述:Serial EEPROM, 256 x 8, 8 Pin, Plastic, SOP |
| 24C02A-E/J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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