- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371394 > 24C02B-EP (Microchip Technology Inc.) 1K/2K 5.0V I 2 C ⑩ Serial EEPROM PDF資料下載
參數(shù)資料
| 型號： | 24C02B-EP |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 1K/2K 5.0V I 2 C ⑩ Serial EEPROM |
| 中文描述： | 1K/2K 5.0VI 2葷⑩串行EEPROM |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 162K |
| 代理商： | 24C02B-EP |
24C01B/02B
DS21233A-page 4
Preliminary
1997 Microchip Technology Inc.
2.0
FUNCTIONAL DESCRIPTION
The 24C01B/02B supports a bi-directional two wire bus
and data transmission protocol. A device that sends
data onto the bus is defined as transmitter, and a
device receiving data as receiver. The bus has to be
controlled by a master device which generates the
serial clock (SCL), controls the bus access, and gener-
ates the START and STOP conditions, while the
24C01B/02B works as slave. Both master and slave
can operate as transmitter or receiver but the master
device determines which mode is activated.
3.0
BUS CHARACTERISTICS
The following
bus protocol
has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 3-1).
3.1
Bus Not Busy (A)
Both data and clock lines remain HIGH.
3.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition.
All commands must be preceded by a START condi-
tion.
3.3
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
3.4
Data Valid (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited, although only the last six-
teen will be stored when doing a write operation. When
an overwrite does occur it will replace data in a first in
first out fashion.
3.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line HIGH to enable
the master to generate the STOP condition.
FIGURE 3-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
Note:
The 24C01B/02B does not generate any
acknowledge bits if an internal program-
ming cycle is in progress.
SCL
SDA
(
A
)
(B)
(D)
(D)
(C)
(
A
)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
相關PDF資料 |
PDF描述 |
|---|---|
| 24C02B-ESN | 1K/2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C | 1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C-IP | 1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C-ISN | 1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C-IST | IC, QUAD PHY 10GX |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 24C02B-ESN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C02BT-E/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C⑩ Serial EEPROM |
| 24C02BT-E/SN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C⑩ Serial EEPROM |
| 24C02C | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:2K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C02C/P | 功能描述:電可擦除可編程只讀存儲器 256x8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復。