參數資料
型號: 24C04A-SN
廠商: Microchip Technology Inc.
英文描述: 1K/2K/4K 5.0V I 2 C O Serial EEPROMs
中文描述: 1K/2K/4K 5.0VI 2二氧化碳串行EEPROM
文件頁數: 9/12頁
文件大小: 107K
代理商: 24C04A-SN
24C04A
DS11183E-page 6
1998 Microchip Technology Inc.
6.0
PAGE PROGRAM MODE
To program the master sends addresses and data to
the 24C04A which is the slave (Figure 6-1 and
Figure 6-2). This is done by supplying a START condi-
tion followed by the 4-bit device code, the 3-bit slave
address, and the R/W bit which is dened as a logic
LOW for a write. This indicates to the addressed slave
that a word address will follow so the slave outputs the
acknowledge pulse to the master during the ninth clock
pulse. When the word address is received by the
24C04A, it places it in the lower 8 bits of the address
pointer dening which memory location is to be written.
(The A0 bit transmitted with the slave address is the
ninth bit of the address pointer). The 24C04A will gen-
erate an acknowledge after every 8-bits received and
store them consecutively in a RAM (8 bytes maximum)
buffer until a STOP condition is detected. This STOP
condition initiates the internal programming cycle.. If
more than 8 bytes are transmitted by the master, the
24C04A will roll over and overwrite the data beginning
with the rst received byte. This does not affect erase/
write cycles of the EEPROM array and is accomplished
as a result of only allowing the address registers bot-
tom 3 bits to increment while the upper 5 bits remain
unchanged.
If the master generates a STOP condition after trans-
mitting the rst data word (Point ‘P’ on Figure 6-1), byte
programming mode is entered.
The internal, completely self-timed PROGRAM cycle
starts after the STOP condition has been generated by
the master and all received data bytes in the page
buffer will be written in a serial manner.
The PROGRAM cycle takes N milliseconds, whereby N
is the number of received data bytes.
FIGURE 6-1:
BYTE WRITE
FIGURE 6-2:
PAGE WRITE
S
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
WORD
ADDRESS
DATA
A
C
K
A
C
K
A
C
K
S
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
WORD
ADDRESS (n)
DATA n
DATA n + 7
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DATA n + 1
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