1996 Microchip Technology Inc.
DS21058G-page 3
24C65
TABLE 1-3:
AC CHARACTERISTICS
FIGURE 1-2:
BUS TIMING DATA
Parameter
Symbol
STD. MODE
FAST MODE
Units
Remarks
Min
Max
Min
Max
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
F
T
T
CLK
—
100
—
—
1000
300
—
—
600
1300
—
—
600
400
—
—
300
300
—
kHz
ns
ns
ns
ns
ns
HIGH
4000
4700
—
—
4000
LOW
T
R
T
F
:
STA
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
START condition
T
HD
START condition setup time
T
SU
:
STA
4700
—
600
—
ns
Data input hold time
Data input setup time
STOP condition setup time
Output valid from clock
Bus free time
T
T
T
HD
:
:
:
DAT
0
—
—
—
0
—
—
—
900
—
ns
ns
ns
ns
ns
SU
DAT
250
4000
—
4700
100
600
—
1300
SU
T
T
STO
AA
3500
—
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), C
B
≤
BUF
Output fall time from V
V
IL
max
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
High Endurance Block
Rest of Array
Note 1: Not 100 percent tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined T
SP
and V
HYS
specifications are due to new Schmitt trigger inputs which provide improved
noise and spike suppression. This eliminates the need for a T
4: The times shown are for a single page of 8 bytes. Multiply by the number of pages loaded into the write
cache for total time.
5: This parameter is not tested but guaranteed by characterization. For endurance estimates on a specific
application, please consult the Total Endurance Mode which can be obtained on our BBS or website.
IH
min to
T
OF
—
250
20 + 0.1
C
—
B
250
ns
100 pF
T
SP
—
50
50
ns
(Note 3)
T
WR
—
5
—
5
ms/page (Note 4)
10M
1M
—
—
10M
1M
—
—
cycles
25
Mode (Note 5)
°
C, Vcc = 5.0V, Block
I
specification for standard operation.
SCL
SDA
IN
SDA
OUT
T
SU
:
STA
T
SP
T
AA
T
F
T
LOW
T
HIGH
T
HD
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
BUF
T
AA
T
R