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參數(shù)資料
| 型號(hào)： | 24FC32-ISM |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 32K 5.0V 1 MHz I 2 C Smart Serial EEPROM |
| 中文描述： | 32K的5.0V 1兆赫的I 2 C串行EEPROM智能 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 99K |
| 代理商： | 24FC32-ISM |
1996 Microchip Technology Inc.
DS21126B-page 3-5
24FC32
3.6
Device Addressing
A control byte is the first byte received following the
start condition from the master device. The control byte
consists of a four bit control code; for the 24FC32 this
is set as 1010 binary for read and write operations. The
next three bits of the control byte are the device select
bits (A2, A1, A0). They are used by the master device
to select which of the eight devices are to be accessed.
These bits are in effect the three most significant bits of
the word address. The last bit of the control byte (R/W)
defines the operation to be performed. When set to a
one a read operation is selected, and when set to a
zero a write operation is selected. The next two bytes
received define the address of the first data byte
(Figure 3-3). Because only A11..A0 are used, the upper
four address bits must be zeros. The most significant bit
of the most significant byte of the address is transferred
first. Following the start condition, the 24FC32 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appropri-
ate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24FC32 will select a read or
write operation.
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
Operation
Control
Code
Device Select
R/W
Read
1010
Device Address
1
Write
1010
Device Address
0
SLAVE ADDRESS
X = Don’t care
1
0
1
0
A2
A1
A0
R/W
A
START
READ/WRITE
FIGURE 3-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
CONTROL
BYTE
ADDRESS
BYTE 1
1
0
1
0
0
0
0
0
A
2
A
0
A
1
R
/
W
Slave
Address
Device
Select
Bits
A
11
A
10
A
9
A
8
A
7
A
0
ADDRESS
BYTE 0
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