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參數(shù)資料
| 型號： | 24LC174 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 16K 2.5V Cascadable CMOS serial EEPROMs with OTP Security Page(16K位,2.5V層疊式IIC串行EEPROM) |
| 中文描述： | 16K的2.5V的安全頁的OTP（16K的位，2.5V的層疊式進口證串行EEPROM的串行EEPROM級聯(lián)的CMOS） |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 133K |
| 代理商： | 24LC174 |
24LC174
DS21101C-page 6
1995 Microchip Technology Inc.
6.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition followed by the control byte
for a write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
read or write command. See Figure 6-1 for flow dia-
gram.
FIGURE 6-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)
Next
Operation
No
Yes
7.0
WRITE PROTECTION
The 24LC174 can be used as a serial ROM when the
WP pin is connected to Vcc. Programming will be
inhibited and the entire memory will be write-protected.
8.0
READ OPERATION
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic
types of read operations: current address read, ran-
dom read, and sequential read.
8.1
Current Address Read
The 24LC174 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous access
(either a read or write operation) was to address n, the
next current address read operation would access data
from address n + 1. Upon receipt of the slave address
with R/W bit set to one, the 24LC174 issues an
acknowledge and transmits the eight bit data word.
The master will not acknowledge the transfer but does
generate a stop condition and the 24LC174 discontin-
ues transmission (see Figure 9-1).
8.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24LC174 as part of a write operation. After the word
address is sent, the master generates a start condition
following the acknowledge. This terminates the write
operation, but not before the internal address pointer is
set. Then the master issues the control byte again but
with the R/W bit set to a one. The 24LC174 will then
issue an acknowledge and transmits the eight bit data
word. The master will not acknowledge the transfer but
does generate a stop condition and the 24LC174 dis-
continues transmission (see Figure 9-2).
FIGURE 8-1:
PAGE WRITE
S
T
O
P
SDA LINE
P
DATA n
S
T
A
R
T
CONTROL
BYTE
WORD
ADDRESS (n)
BUS ACTIVITY:
MASTER
BUS ACTIVITY:
A
C
K
A
C
K
A
C
K
DATA n + 1
A
C
K
DATA n + 15
A
C
K
S
A2
B0
A1 A0 B2 B1
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| 24LC21-ISN | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
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| 24LC21-P | Connector; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC174/P | 制造商:Microchip Technology Inc 功能描述:2K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 24LC174-/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:16K 2.5V Cascadable I2C⑩ Serial EEPROM with OTP Security Page |
| 24LC174/SN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC174-/SN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:16K 2.5V Cascadable I2C⑩ Serial EEPROM with OTP Security Page |
| 24LC174I/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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