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參數(shù)資料
| 型號： | 24LCS22A |
| 英文描述： | 24LCS22A Datasheet |
| 中文描述： | 24LCS22A數(shù)據(jù)表 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 159K |
| 代理商： | 24LCS22A |
1999 Microchip Technology Inc.
DS21127D-page 5
24LCS21
3.0
BI-DIRECTIONAL MODE
The 24LCS21 can be switched into the bi-directional
Mode (Figure 3-1) by applying a valid high to low
transition on the bi-directional Mode Clock (SCL).
When the device has been switched into the bi-direc-
tional Mode, the VCLK input is disregarded, with the
exception that a logic high level is required to enable
write capability. This mode supports a two-wire
bi-directional data transmission protocol (I2C
). In this
protocol, a device that sends data on the bus is dened
to be the transmitter, and a device that receives data
from the bus is dened to be the receiver. The bus must
be controlled by a master device that generates the
bi-directional Mode Clock (SCL), controls access to the
bus and generates the START and STOP conditions,
while the 24LCS21 acts as the slave. Both master and
slave can operate as transmitter or receiver, but the
master device determines which mode is activated.
In
this
mode,
the
24LCS21
only
responds
to
commands for device 1010 000X.
3.1 Bi-directional Mode Bus Characteristics
The following bus protocol has been dened:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
dened (Figure 3-2).
3.1.1
BUS NOT BUSY (A)
Both data and clock lines remain HIGH.
3.1.2
START DATA TRANSFER (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.
3.1.3
STOP DATA TRANSFER (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
FIGURE 3-1: MODE TRANSITION
FIGURE 3-2: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
SCL
SDA
VCLK
Bi-directional Mode
TVHZ
Transmit Only Mode
(A)
(B)
(D)
(A)
(C)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
SCL
SDA
This Material Copyrighted by Its Respective Manufacturer
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相關(guān)代理商/技術(shù)參數(shù) |
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| 24LCS22A-I/P | 功能描述:電可擦除可編程只讀存儲器 VESA E-EDID RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS22A-I/PG | 功能描述:電可擦除可編程只讀存儲器 VESA E-EDID Lead Free Package RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS22A-I/SN | 功能描述:電可擦除可編程只讀存儲器 VESA E-EDID RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS22A-I/SNG | 功能描述:電可擦除可編程只讀存儲器 VESA E-EDID Lead Free Package RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS22AT-I/SN | 功能描述:電可擦除可編程只讀存儲器 VESA E-EDID RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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