參數(shù)資料
型號(hào): 24LCS52TISTG
廠商: Microchip Technology Inc.
元件分類: EEPROM
英文描述: 2K 2.2V I2C Serial EEPROM with Software Write-Protect
中文描述: 2K 2.2伏的I2C串行EEPROM與軟件寫(xiě)保護(hù)
文件頁(yè)數(shù): 3/22頁(yè)
文件大小: 254K
代理商: 24LCS52TISTG
2004 Microchip Technology Inc.
DS21210G-page 3
24AA024/24LC024/24AA025/24LC025
TABLE 1-2:
All parameters apply across the specified
operating ranges unless otherwise noted.
AC CHARACTERISTICS
FIGURE 1-1:
BUS TIMING DATA
V
CC
= 1.8V to 5.5V
Industrial (I):
T
A
= -40°C to +85°C
Parameter
Symbol
STD MODE
Vcc = 2.5V - 5.5V
FAST MODE
Units
Remarks
Min.
4000
4700
4000
Max.
100
1000
300
Min.
600
1300
600
Max.
400
300
300
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
kHz
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
Start condition
(Note 2)
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1)
, C
B
100 pF
Start condition setup time
T
SU
:
STA
4700
600
ns
Data input hold time
Data input setup time
Stop condition setup time
Output valid from clock
Bus free time
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
AA
T
BUF
0
0
900
ns
ns
ns
ns
ns
250
4000
4700
100
600
1300
3500
Output fall time from V
IH
minimum to V
IL
maximum
Input filter spike suppression
(SDA and SCL pins)
Write-cycle time
Endurance
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined T
SP
and V
HYS
specifications are due to Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which can be downloaded at
www.microchip.com.
T
OF
250
20 +0.1
C
B
250
ns
T
SP
50
50
ns
(Note 3)
T
WC
1M
10
1M
10
ms
Byte or Page mode
cycles 25°C,
(Note 4)
SCL
SDA
IN
T
SU
:
STA
SDA
OUT
T
HD
:
STA
T
LOW
T
HIGH
T
R
T
BUF
T
AA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
SP
T
F
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