參數(shù)資料
型號： 25628A
英文描述： Evaluation Kit for the MAX115, MAX116
中文描述： 從Am29LV640DU到MirrorBit遷移？ Am29LV640MU
文件頁數(shù)： 5/7頁
文件大?。?/td> 120K
代理商： 25628A
4
Migration from Am29LV640DU to MirrorBit
TM
Am29LV640MU
Table 5.
Power Consumption
New Page Read Buffer and Write Buffer
Features
Page Read Buffer and Page Write Buffer are two new
performance-enhancing features in MirrorBit devices.
The Page Read Buffer feature increases read perfor-
mance significantly. This mode provides faster read
access speed for random locations within a page. The
page size of the device is 4 words. Pages are located
on 4 word boundaries. The first access within a page
requires the full random access time for the device, 90
to 120ns depending on the speed grade. Subsequent
accesses that remain within the same page address
range, while Chip Select (CE#) remains asserted, have
a reduced page access time of 25 to 40 ns. The page
read buffer is automatically used by standard read ac-
cesses. No special commands or signals are needed.
The system only needs to keep CE# active throughout
page mode accesses and be aware of the reduced ac-
cess time for accesses remaining within a page. The
system can reduce the number of wait states for within
page accesses and take advantage of the increased
read performance.
The addition of a Page Write Buffer doubles the pro-
gramming throughput compared to current
Am29LV640DU devices. The Page Write Buffer is a
set of registers used to hold several words that are to
be programmed as a group. The Page Write Buffer al-
lows the system to write to a maximum of 16 words in
one programming operation. The Write Buffer pro-
gramming command sequence is initiated by first writ-
ing two unlock cycles. Below is the flowchart for Write
Buffer Programming. See
“MirrorBit
Flash Memory
plication note, publication 25539
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