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參數(shù)資料
| 型號(hào)： | 25C320 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 32K 5.0V SPI Bus Serial EEPROM |
| 中文描述： | 32K的5.0V SPI總線串行EEPROM |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 86K |
| 代理商： | 25C320 |
1996 Microchip Technology Inc.
Preliminary
DS21159B-page 5
25C320
2.0
PRINCIPLES OF OPERATION
The 25C320 is a 4096-byte EEPROM designed to
interface directly with the serial peripheral interface (SPI)
port of many of today’s popular microcontroller families,
including Microchip’s midrange PIC16CXX microcontrol-
lers. It may also interface with microcontrollers that do
not have a built-in SPI port by using discrete I/O lines
programmed properly with software.
The 25C320 contains an 8-bit instruction register. The
part is accessed via the SI pin, with data being clocked
in on the rising edge of SCK. The CS pin must be low
and the HOLD pin must be high for the entire operation.
If the WPEN bit in the status register is set, the WP pin
must be held high to allow writing to the nonvolatile bits
in the status register.
Table 2-1 contains a list of the possible instruction bytes
and format for device operation. All instructions,
addresses and data are transferred MSB first, LSB last.
Data is sampled on the first rising edge of SCK after CS
goes low. If the clock line is shared with other peripheral
devices on the SPI bus, the user can assert the HOLD
input and place the 25C320 in ‘HOLD’ mode. After
releasing the HOLD pin, operation will resume from the
point when the HOLD was asserted.
2.1
Write Enable (WREN) and Write
Disable (WRDI)
The 25C320 contains a write enable latch. This latch
must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch. The following is
a list of conditions under which the write enable latch
will be reset:
Power-up
WRDI instruction successfully executed
WRSR instruction successfully executed
WRITE instruction successfully executed
2.2
Read Status Register (RDSR)
The RDSR instruction provides access to the status
register. The status register may be read at any time,
even during a write cycle. The status register is format-
ted as follows:
The
Write-In-Process (WIP)
bit indicates whether the
25C320 is busy with a write operation. When set to a ‘1’
a write is in progress, when set to a ‘0’ no write is in
progress. This bit is read only.
7
6
X
5
X
4
X
3
2
1
0
WPEN
BP1
BP0
WEL
WIP
The
Write Enable Latch (WEL)
bit indicates the status
of the write enable latch. When set to a ‘1’ the latch
allows writes to the array and status register, when set
to a ‘0’ the latch prohibits writes to the array and status
register. The state of this bit can always be updated via
the WREN or WRDI commands regardless of the state
of write protection on the status register. This bit is read
only.
The
Block Protection (BP0 and BP1)
bits indicate
which blocks are currently write protected. These bits
are set by the user issuing the WRSR instruction.
These bits are non-volatile.
The
Write Protect Enable (WPEN)
bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write Protect (WP) pin and the Write Protect Enable
(WPEN) bit in the status register control the
programmable
hardware
Hardware write protection is enabled when the WP pin
is low and the WPEN bit is high. Hardware write
protection is disabled when either the WP pin is high or
the WPEN bit is low. When the chip is hardware write
protected, only writes to nonvolatile bits in the status
register are disabled. See Table 2-2 for matrix of
functionality on the WPEN bit and Figure 2-1 for a
flowchart of Table 2-2.
See Figure 3-5 for RDSR timing sequence.
write
protect
feature.
TABLE 2-1:
INSTRUCTION SET
Instruction
Name
WREN
Instruction
Format
0000 0110
Description
Set the write enable latch
(enable write operations)
Reset the write enable
latch (disable write opera-
tions)
Read status register
Write status register (write
protect enable and block
write protection bits)
Read data from memory
array beginning at
selected address
Write data to Memory
Array beginning at
Selected Address
WRDI
0000 0100
RDSR
WRSR
0000 0101
0000 0001
READ
0000 0011
WRITE
0000 0010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 25C320/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 4kx8 5V RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 25C320-/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM |
| 25C320/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 4kx8 5V RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 25C320-/SN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM |
| 25C320/SN | 制造商:Microchip Technology Inc 功能描述:SERIAL EEPROM IC |
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