參數(shù)資料
型號: 25LC256-IP
廠商: Microchip Technology Inc.
元件分類: EEPROM
英文描述: 256K SPI Bus Serial EEPROM
中文描述: 256K SPI總線串行EEPROM
文件頁數(shù): 12/26頁
文件大?。?/td> 367K
代理商: 25LC256-IP
25AA256/25LC256
DS21822C-page 12
Preliminary
2003 Microchip Technology Inc.
2.7
Data Protection
The following protection has been implemented to
prevent inadvertent writes to the array:
The write enable latch is reset on power-up
A write enable instruction must be issued to set
the write enable latch
After a byte write, page write or Status register
write, the write enable latch is reset
CS must be set high after the proper number of
clock cycles to start an internal write cycle
Access to the array during an internal write cycle
is ignored and programming is continued
2.8
Power-On State
The 25XX256 powers on in the following state:
The device is in low-power Standby mode
(CS=
1
)
The write enable latch is reset
SO is in high-impedance state
A high-to-low-level transition on CS is required to
enter active state
TABLE 2-4:
WRITE-PROTECT FUNCTIONALITY MATRIX
WEL
(SR bit 1)
WPEN
(SR bit 7)
WP
(pin 3)
Protected Blocks
Unprotected Blocks
Status Register
0
x
x
Protected
Protected
Protected
Protected
Protected
Writable
Writable
Writable
Protected
Writable
Protected
Writable
1
0
x
1
1
0
(low)
1
(high)
1
1
x
= don’t care
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