參數(shù)資料
型號(hào)： 25LC320T
廠商： Microchip Technology Inc.
元件分類： EEPROM
英文描述： 32K SPI Bus Serial EEPROM
中文描述： 32K的SPI總線串行EEPROM
文件頁(yè)數(shù)： 4/12頁(yè)
文件大?。?/td> 87K
代理商： 25LC320T
25LC320
DS21158B-page 4
Preliminary
1996 Microchip Technology Inc.
TABLE 1-3:
AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
V
CC
= 2.5V to 5.5V
Commercial (C):
Tamb = 0
°
C to +70
°
C
Industrial (I):
Tamb = -40
°
C to +85
°
C
Symbol
Parameter
f
SCK
Clock Frequency
Min
—
—
100
250
100
250
250
500
30
50
50
100
—
—
150
250
150
250
50
—
—
0
—
—
100
100
100
100
100
150
100
150
—
1M
Max
3
2
—
—
—
—
—
—
—
—
—
—
2
2
—
—
—
—
—
150
250
—
200
250
—
—
—
—
—
—
—
—
5
—
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Test Conditions
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
(Note 1)
(Note 1)
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
t
CSS
CS Setup Time
t
CSH
CS Hold Time
t
CSD
CS Disable Time
t
SU
Data Setup Time
t
HD
Data Hold Time
t
R
t
F
t
HI
CLK Rise Time
CLK Fall Time
Clock High Time
t
LO
Clock Low Time
t
CLD
t
V
Clock Delay Time
Output Valid from
Clock Low
Output Hold Time
Output Disable Time
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
t
HO
t
DIS
V
CC
=4.5V to 5.5V (Note 1)
V
CC
=2.5V to 4.5V (Note 1)
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V
V
CC
=2.5V to 4.5V
V
CC
=4.5V to 5.5V (Note 1)
V
CC
=2.5V to 4.5V (Note 1)
V
CC
=4.5V to 5.5V (Note 1)
V
CC
=2.5V to 4.5V (Note 1)
(Note 2)
E/W Cycles 25
°
C, Vcc = 5.0V, Block Mode
(Note 3)
t
HS
HOLD Setup Time
t
HH
HOLD Hold Time
t
HZ
HOLD Low to Output High-Z
t
HV
HOLD High to Output Valid
t
WC
—
Internal Write Cycle Time
Endurance
Note 1: This parameter is periodically sampled and not 100% tested.
2: t
WC
begins on the rising edge of CS after a valid write sequence and ends when the internal self-timed write
cycle is complete.
3: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
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