1996 Microchip Technology Inc.
DS11126F-page 1
FEATURES
Fast Read Access Time—150 ns
CMOS Technology for Low Power Dissipation
- 30 mA Active
- 100
μ
A Standby
Fast Byte Write Time—200
Data Retention >200 years
Endurance - Minimum 10
- Automatic Write Operation
- Internal Control Timer
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
Data Polling
Chip Clear Operation
Enhanced Data Protection
- V
CC
Detector
- Pulse Filter
- Write Inhibit
5-Volt-Only Operation
Organized 512x8 JEDEC standard pinout
- 24-pin Dual-In-Line Package
- 32-pin PLCC Package
Available for Extended Temperature Ranges:
- Commercial: 0C to +70C
- Industrial: -40C to +85C
μ
s or 1 ms
4
Erase/Write Cycles
DESCRIPTION
The Microchip Technology Inc. 28C04A is a CMOS 4K
non-volatile electrically Erasable and Programmable
Read Only Memory (EEPROM). The 28C04A is
accessed like a static RAM for the read or write cycles
without the need of external components. During a
“byte write”, the address and data are latched internally,
freeing the microprocessor address and data bus for
other operations. Following the initiation of write cycle,
the device will go to a busy state and automatically
clear and write the latched data using an internal con-
trol timer. To determine when a write cycle is complete,
the 28C04A uses Data polling. Data polling allows the
user to read the location last written to when the write
operation is complete. CMOS design and processing
enables this part to be used in systems where reduced
power consumption and reliability are required. A com-
plete family of packages is offered to provide the utmost
flexibility in applications.
PACKAGE TYPES
BLOCK DIAGRAM
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
Vcc
A8
NC
WE
OE
NC
CE
I/O7
I/O6
I/O5
I/O4
I/O3
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
A8
NC
NC
NC
OE
NC
CE
I/O7
I/O6
A
4
N
3
N
2
N
1
V
3
W
3
N
3
I
I
V
N
I
I
I
1
1
1
1
1
1
2
29
28
27
26
25
24
23
22
21
5
6
7
8
9
10
11
12
13
DIP
PLCC
2
Pin 1 indicator on PLCC on top of package
2
I/O0
I/O7
Input/Output
Buffers
Chip Enable/
Output Enable
Control Logic
Auto Erase/Write
Timing
CE
OE
WE
Data Protection
Circuitry
A8
Y Gating
4K bit
Cell Matrix
X
Decoder
Y
Decoder
A0
Data
Poll
V
CC
V
SS
L
a
t
c
h
e
s
Program Voltage
Generation
28C04A
4K (512 x 8) CMOS EEPROM
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