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參數(shù)資料
| 型號： | 27C2000-35 |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | 2M-BIT [256K x 8] CMOS EPROM |
| 中文描述： | 200萬位[256K × 8]的CMOS存儲器 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 1004K |
| 代理商： | 27C2000-35 |
2
REV. 4.2, AUG. 26, 2003
P/N: PM0157
MX27C2000
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25
°
C
±
5
°
C ambient temperature range
that is required when programming the MX27C2000.
To activate this mode, the programming equipment must
force 12.0
±
0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line A0 from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
Byte 0 ( A0 = VIL) represents the manufacturer code, and
byte 1 (A0 = VIH), the device identifier code. For the
MX27C2000, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (Q7)
defined as the parity bit.
READ MODE
The MX27C2000 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to
the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE, assuming that CE has been LOW and addresses
have been stable for at least tACC - tOE.
STANDBY MODE
The MX27C2000 has a CMOS standby mode which
reduces the maximum VCC current to 100 uA. It is
placed in CMOS standby when CE is at VCC
±
0.3 V. The
MX27C2000 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
FUNCTIONAL DESCRIPTION
THE PROGRAMMING OF THE MX27C2000
When the MX27C2000 is delivered, or it is erased, the
chip has all 2M bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27C2000 through the
procedure of programming.
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
VCC must be applied simultaneously or before VPP, and
removed simultaneously or after VPP. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across VPP and ground to suppress spurious
voltage transients which may damage the device.
FAST PROGRAMMING
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and PGM = VIH (Algorithm is shown in
Figure 1). The programming is achieved by applying a
single TTL low level 100us pulse to the PGM input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device. When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V
±
10%.
PROGRAM INHIBIT MODE
Programming of multiple MX27C2000s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C2000 may be common. A
TTL low-level program pulse applied to an MX27C2000
CE input with VPP = 12.5
±
0.5 V and PGM LOW will
program that MX27C2000. A high-level CE input inhibits
the other MX27C2000s from being programmed.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE and CE at VIL,
PGM at VIH, and VPP at its programming voltage.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 27C2000-45 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-55 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-70 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-90 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-10 | 2M-BIT [256K x 8] CMOS EPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 27C2000-45 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-55 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-10 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
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