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參數(shù)資料
| 型號(hào)： | 27C2000-45 |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | 2M-BIT [256K x 8] CMOS EPROM |
| 中文描述： | 200萬(wàn)位[256K × 8]的CMOS存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大?。?/td> | 1004K |
| 代理商： | 27C2000-45 |
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3
REV. 4.2, AUG. 26, 2003
P/N: PM0157
MX27C2000
SYSTEM CONSIDERATIONS
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GND to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
used between VCC and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
NOTES:
1. VH = 12.0 V
±
0.5 V
2. X = Either VIH or VIL
3. A1 - A8 = A10 - A17 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
MODE SELECT TABLE
PINS
MODE
CE
OE
PGM
A0
A9
VPP
OUTPUTS
Read
VIL
VIL
X
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
X
VCC
High Z
Standby (TTL)
VIH
X
X
X
X
VCC
High Z
Standby (CMOS)
VCC
±
0.3V
X
X
X
X
VCC
High Z
Program
VIL
VIH
VIL
X
X
VPP
DIN
Program Verify
VIL
VIL
VIH
X
X
VPP
DOUT
Program Inhibit
VIH
X
X
X
X
VPP
High Z
Manufacturer Code(3)
VIL
VIL
X
VIL
VH
VCC
C2H
Device Code(3)
VIL
VIL
X
VIH
VH
VCC
20H
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins are
only active when data is desired from a particular memory
device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 27C2000-55 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-70 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-90 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-10 | 2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-12 | 2M-BIT [256K x 8] CMOS EPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 27C2000-55 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-10 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
| 27C2000A-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256K x 8] CMOS EPROM |
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