參數(shù)資料
型號: 27C256-12IVS
廠商: Microchip Technology Inc.
英文描述: 256K (32K x 8) CMOS EPROM
中文描述: 256K(32K的× 8)的CMOS存儲器
文件頁數(shù): 8/12頁
文件大小: 182K
代理商: 27C256-12IVS
Functional Description
(Continued)
Program Verify
A verify should be performed on the programmed bits to
determine whether they were correctly programmed. The
verify may be performed with V
PP
at 12.75V. V
PP
must be at
V
CC
, except during programming and program verify.
AFTER PROGRAMMING
Opaque labels should be placed over the EPROM window
to prevent unintentional erasure. Covering the window will
also prevent temporary functional failure due to the genera-
tion of photo currents.
MANUFACTURER’S IDENTIFICATION CODE
The EPROM has a manufacturer’s identification code to aid
in programming. When the device is inserted in an EPROM
programmer socket, the programmer reads the code and
then automatically calls up the specific programming algo-
rithm for the part. This automatic programming control is
only possible with programmers which have the capability of
reading the code.
The Manufacturer’s Identification code, shown in Table II,
specifically identifies the manufacturer and device type. The
code for NM27C256 is ‘‘8F04’’, where ‘‘8F’’ designates that
it is made by National Semiconductor, and ‘‘04’’ designates
a 256K part.
The code is accessed by applying 12V
g
0.5V to address
pin A9. Addresses A1–A8, A10–A16, and all control pins
are held at V
IL
. Address pin A0 is held at V
IL
for the manu-
facturer’s code, and held at V
IH
for the device code. The
code is read on the eight data pins, O
0
–O
7
. Proper code
access is only guaranteed at 25
§
C to
g
5
§
C.
ERASURE CHARACTERISTICS
The erasure characteristics of the device are such that era-
sure begins to occur when exposed to light with wave-
lengths shorter than approximately 4000 Angstroms (
D
). It
should be noted that sunlight and certain types of fluores-
cent lamps have wavelengths in the 3000
D
–4000
D
range.
The recommended erasure procedure for the EPROM is ex-
posure to short wave ultraviolet light which has a wave-
length of 2537
D
. The integrated dose (i.e., UV intensity
c
exposure time) for erasure should be a minimum of
15W-sec/cm
2
.
The EPROM should be placed within 1 inch of the lamp
tubes during erasure. Some lamps have a filter on their
tubes which should be removed before erasure. Table III
shows the minimum EPROM erasure time for various light
intensities.
An erasure system should be calibrated periodically. The
distance from lamp to device should be maintained at one
inch. The erasure time increases as the square of the dis-
tance from the lamp (if distance is doubled the erasure time
increases by factor of 4). Lamps lose intensity as they age.
When a lamp is changed, the distance has changed, or the
lamp has aged, the system should be checked to make cer-
tain full erasure is occurring. Incomplete erasure will cause
symptoms that can be misleading. Programmers, compo-
nents, and even system designs have been erroneously
suspected when incomplete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require
careful decoupling of the devices. The supply current, I
CC
,
has three segments that are of interest to the system de-
signer: the standby current level, the active current level,
and the transient current peaks that are produced by volt-
age transitions on input pins. The magnitude of these tran-
sient current peaks is dependent of the output capacitance
loading of the device. The associated V
CC
transient voltage
peaks can be suppressed by properly selected decoupling
capacitors. It is recommended that at least a 0.1
m
F ceramic
capacitor be used on every device between V
CC
and GND.
This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7
m
F bulk electrolytic
capacitor should be used between V
CC
and GND for each
eight devices. The bulk capacitor should be located near
where the power supply is connected to the array. The pur-
pose of the bulk capacitor is to overcome the voltage drop
caused by the inductive effects of the PC board traces.
8
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