參數(shù)資料
型號: 27C512A-90P
廠商: Microchip Technology Inc.
英文描述: 512K (64K x 8) CMOS EPROM
中文描述: 為512k(64K的× 8)的CMOS存儲器
文件頁數(shù): 3/12頁
文件大?。?/td> 69K
代理商: 27C512A-90P
1996 Microchip Technology Inc.
DS11173E-page 3
27C512A
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
FIGURE 1-1:
READ WAVEFORMS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times:
Ambient Temperature:
V
1 TTL Load + 100 pF
10 ns
Commercial:
Industrial:
Extended (Automotive):
IH
= 2.4V and V
IL
= .45V; V
OH
= 2.0V and V
OL
= 0.8V
Tamb = 0C to +70C
Tamb = -40C to +85C
Tamb = -40C to +125C
Parameter
Sym
27C512-90*
27C512-10*
27C512-12
27C512-15
Units
Conditions
Min
Max
Min
Max
Min
Max
Min
Max
Address to Output
Delay
CE to Output Delay
t
ACC
90
100
120
150
ns
CE = OE/
V
PP
= V
OE/V
V
IL
CE = V
IL
t
CE
90
100
120
150
ns
PP
=
OE to Output Delay
OE to Output High
Impedance
Output Hold from
Address, CE or OE/
V
PP
, whichever
occurred first
t
OE
0
40
35
0
40
35
0
50
40
0
60
45
ns
ns
IL
t
OFF
t
OH
0
0
0
0
ns
*90/10 AC Testing Waveforms: V
Output Load: 1 TTL Load + 30 pF
IH
= 3.0V and V
IL
= 0V; V
OH
= 1.5V and V
OL
= 1.5V
Address
CE
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
OE
Outputs
O0 - O7
V
OH
V
OL
Address Valid
t
CE(2)
t
OE(2)
High Z
Valid Output
t
ACC
(1) t
OFF
is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
(3) This parameter is sampled and is not 100% tested.
High Z
t
OH
t
OFF(1,3)
Notes:
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