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參數(shù)資料
| 型號： | 286C6116FSC |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 MICROCONTROLLER |
| 中文描述： | 單片機(jī)的CMOS Z8 |
| 文件頁數(shù)： | 26/46頁 |
| 文件大?。?/td> | 388K |
| 代理商： | 286C6116FSC |
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Z86C61/62/96
Z8
M
ICROCONTROLLER
crystal should be connected across XTAL1 and XTAL2
using the recommended capacitors (10 pF < CL < 100 pF)
from each pin to device ground (Figure 24).
Note:
Actual capacitor values specified by the crystal
manufacturer.
FUNCTIONAL DESCRIPTION
(Continued)
Clock.
The Z86C61/62/96 on-chip oscillator has a high-
gain, parallel-resonant amplifier for connection to a crys-
tal, LC, ceramic resonator, or any suitable external clock
source (XTAL1 = Input, XTAL2 = Output). The crystal
should be AT cut, 1 MHz to 20 MHz max, and series
resistance (RS) is less than or equal to 100 Ohms. The
XTAL1
XTAL2
C1
C2
C1
C2
XTAL1
XTAL2
XTAL1
XTAL2
Ceramic Resonator
or Crystal
LC Clock
External Clock
L
Figure 24. Oscillator Configuration
HALT.
Turns off the internal CPU clock but not the XTAL
oscillation. The counter/timers and the external interrupts
IRQ0, IRQ1, IRQ2, and IRQ3 remain active. The devices
are recovered by interrupts, either externally or internally
generated. An interrupt request must be executed (en-
abled) to exit HALT mode. After the interrupt service
routine, the program continues from the instruction after
the HALT.
STOP.
This instruction turns off the internal clock and
external crystal oscillation and reduces the standby cur-
rent to 5
μ
A (typical) or less. The STOP mode is terminated
by a reset, which causes the processor to restart the
application program at address 000CH.
In order to enter STOP (or HALT) mode, it is necessary to
first flush the instruction pipeline to avoid suspending
execution in mid-instruction. To do this, the user must
execute a NOP (opcode=0FFH) immediately before the
appropriate sleep instruction, i.e.,
FF
6F
NOP
STOP
; clear the pipeline
; enter STOP mode
or
; clear the pipeline
; enter HALT mode
FF
7F
NOP
HALT
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