- 您現在的位置：買賣IC網 > PDF目錄368957 > 28F160F3 (Intel Corp.) 16MBIT Fast Boot Block Flash Memory(16兆位的快速引導塊閃速存儲器) PDF資料下載
參數資料
| 型號： | 28F160F3 |
| 廠商： | Intel Corp. |
| 英文描述： | 16MBIT Fast Boot Block Flash Memory(16兆位的快速引導塊閃速存儲器) |
| 中文描述： | 16兆快速啟動塊快閃記憶體（16兆位的快速引導塊閃速存儲器） |
| 文件頁數： | 18/47頁 |
| 文件大小： | 277K |
| 代理商： | 28F160F3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
FAST BOOT BLOCK DATASHEET
E
18
PRODUCT PREVIEW
Table 6. Read Configuration Register Definition
RM
R
FC2
FC1
FC0
R
DOC
WC
15
14
13
12
11
10
9
8
BS
CC
R
R
R
BL2
BL1
BL0
7
6
5
4
3
2
1
0
NOTES:
RCR.15 = READ MODE (RM)
0 = Synchronous Burst Reads Enabled
1 = Page-Mode Reads Enabled (Default)
Read mode configuration effects reads from
main blocks. Parameter block, status register,
and identifier reads support single read cycles.
RCR.14 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to
“0.”
RCR.13
–11 = FREQUENCY CONFIGURATION (FC2-0)
001 = Code 1 reserved for future use
010 = Code 2
011 = Code 3
100 = Code 4
101 = Code 5
110 = Code 6
See Section 4.9.2 for information about the
frequency configuration and its effect on the
initial read.
Undocumented combinations of bits
RCR.14–11 are reserved by Intel Corporation
for future implementations and should not be
used.
RCR.10 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to “0.”
RCR.9 = DATA OUTPUT CONFIGURATION (DOC)
0 = Hold Data for One Clock
1 = Hold Data for Two Clocks
Undocumented combinations of bits RCR.10–9
are reserved by Intel Corporation for future
implementations and should not be used.
RCR.8 = WAIT CONFIGURATION (WC)
0 = WAIT# Asserted During Delay
1 = WAIT# Asserted One Data Cycle Before Delay
RCR.7 = BURST SEQUENCE (BS)
0 = Intel Burst Order
1 = Linear Burst Order
RCR.6 = CLOCK CONFIGURATION (CC)
0 = Burst Starts and Data Output on Falling
Clock Edge
1 = Burst Starts and Data Output on Rising
Clock Edge
RCR.5–3 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to “0.”
RCR.2–0 = BURST LENGTH (BL2–0)
001 = 4 Word Burst
010 = 8 Word Burst
111 = Continuous Burst
In the asynchronous page mode, the burst
length always equals four words.
Undocumented combinations of bits RCR.2–0
are reserved by Intel Corporation for future
implementations and should not be used
相關PDF資料 |
PDF描述 |
|---|---|
| 28F2001BX-T | 5V/3.3V or Adjustable, Low-Dropout, Low-IQ, 500mA Linear Regulators |
| 28F256 | FASTENERS, TIES CABLE |
| 28F256 | 256 Kilobit (32 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory |
| 28F320S3 | WORD-WIDE FlashFile MEMORY FAMILY |
| 28F320S5 | WORD-WIDE FlashFile MEMORY FAMILY |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 28F160F3B95 | 制造商:Intel 功能描述: |
| 28F160S3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| 28F160S3HTL10A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F160S3HT-L10A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F160S3HT-L75A | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。