
21
Alldatasheetsaresubjecttochangewithoutnotice
2002MaxwellTechnologies
Allrightsreserved.
32Megabit(4Mx8-Bit)FlashMemory
29F0408
11.08.02Rev2
DEVICE OPERATION
PAGE READ
Uponinitialdevicepowerup, thedevicedefaults toRead1mode. This operationis alsoinitiatedbywriting
00htothe commandregisteralong withthree address cycles. Once the commandis latched, it does not
needtobewrittenforthefollowing pagereadoperation. Three types ofoperations are available: random
read,serialpagereadandsequentialread.
The randomreadmode is enabledwhenthe page address is changed. The 528 bytes of data withinthe
selectedpagearetransferredtothedataregisters inless than10ms(t
R
). TheCPUcandetectthecomple-
tionofthis datatransfer(t
R
) by analyzing the outputofR/B pin. Once the data inapage is loadedintothe
registers, theymaybereadoutin50ns cycletimebysequentiallypulsingRE withCE stayinglow Highto
lowtransitions oftheRE clockoutputthedatastartingfromtheselectedcolumnaddress uptothelastcol-
umnaddress(column511or527dependingonstateofSE pin).
Afterthedataoflastcolumnaddress is clockedout, thenextpageis automaticallyselectedforsequential
read.
Waiting10μsagainallowsforreadingoftheselectedpage.Thesequentialreadoperationistermnatedby
bringing CE high. The way the Read1 andRead2 commands work is like a pointersettoeitherthe main
area or the spare area. The spare area of bytes 512 to 527 may be selectively accessed by writing the
Read2commandwithSE pinlow Toggling SE during operationis prohibited. Addresses A0toA3setthe
starting address ofthespare areawhile addresses A4toA7areignored. Unless theoperationis aborted,
thepageaddressisautomaticallyincrementedforsequentialreadasinRead1operationandsparesixteen
bytes of each page may be sequentially read. The Read1 command (00h/01h) is needed to move the
pointerbacktothemainarea. Figures 22thru25showtypicalsequenceandtimngs foreachreadopera-
tion.