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參數(shù)資料
| 型號： | 29LV040C-55R |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | 4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY EQUAL SECTOR FLASH MEMORY |
| 中文描述： | 4分位[為512k × 8] CMOS單電壓3V只等于部門閃存 |
| 文件頁數(shù)： | 13/52頁 |
| 文件大小： | 499K |
| 代理商： | 29LV040C-55R |
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13
P/N:PM1149
MX29LV040C
REV. 1.3, APR. 24, 2006
WRITE OPERATION STATUS
The device provides several bits to determine the sta-
tus of a write operation: Q2, Q3, Q5, Q6 and Q7. Table 6
and the following subsections describe the functions of
these bits. Q7 and Q6 each offer a method for determin-
ing whether a program or erase operation is complete or
in progress. These three bits are discussed first.
Q7: Data# Polling
The Data# Polling bit, Q7, indicates to the host sys-tem
whether an Automatic Algorithm is in progress or com-
pleted, or whether the device is in Erase Suspend. Data#
Polling is valid after the rising edge of the final WE# pulse
in the program or erase command sequence.
During the Automatic Program algorithm, the device out-
puts on Q7 the complement of the datum programmed
to Q7. This Q7 status also applies to programming dur-
ing Erase Suspend. When the Automatic Program algo-
rithm is complete, the device outputs the datum pro-
grammed to Q7. The system must provide the program
address to read valid status information on Q7. If a pro-
gram address falls within a protected sector, Data# Poll-
ing on Q7 is active for approximately 1 us, then the de-
vice returns to reading array data.
During the Automatic Erase algorithm, Data# Polling pro-
duces a "0" on Q7. When the Automatic Erase algo-
rithm is complete, or if the device enters the Erase Sus-
pend mode, Data# Polling produces a "1" on Q7. This is
analogous to the complement/true datum output de-
scribed for the Automatic Program algorithm: the erase
function changes all the bits in a sector to "1" prior to
this, the device outputs the "complement," or "0". The
system must provide an address within any of the sec-
tors selected for erasure to read valid status information
on Q7.
After an erase command sequence is written, if all sec-
tors selected for erasing are protected, Data# Polling on
Q7 is active for approximately 100 us, then the device
returns to reading array data. If not all selected sectors
are protected, the Automatic Erase algorithm erases the
unprotected sectors, and ignores the selected sectors
that are protected.
When the system detects Q7 has changed from the
complement to true data, it can read valid data at Q7-Q0
on the following read cycles. This is because Q7 may
change asynchronously with Q0-Q6 while Output Enable
(OE#) is asserted low.
Q6:Toggle BIT I
Toggle Bit I on Q6 indicates whether an Automatic Pro-
gram or Erase algorithm is in progress or complete, or
whether the device has entered the Erase Suspend mode.
Toggle Bit I may be read at any address, and is valid
after the rising edge of the final WE# or CE#, whichever
happens first, in the command sequence (prior to the
program or erase operation), and during the sector time-
out.
During an Automatic Program or Erase algorithm opera-
tion, successive read cycles to any address cause Q6
to toggle. The system may use either OE# or CE# to
control the read cycles. When the operation is complete,
Q6 stops toggling.
After an erase command sequence is written, if all sec-
tors selected for erasing are protected, Q6 toggles and
returns to reading array data. If not all selected sectors
are protected, the Automatic Erase algorithm erases the
unprotected sectors, and ignores the selected sectors
that are protected.
The system can use Q6 and Q2 together to determine
whether a sector is actively erasing or is erase sus-
pended. When the device is actively erasing (that is, the
Automatic Erase algorithm is in progress), Q6 toggling.
When the device enters the Erase Suspend mode, Q6
stops toggling. However, the system must also use Q2
to determine which sectors are erasing or erase-sus-
pended. Alternatively, the system can use Q7.
If a program address falls within a protected sector, Q6
toggles for approximately 2 us after the program com-
mand sequence is written, then returns to reading array
data.
Q6 also toggles during the erase-suspend-program mode,
and stops toggling once the Automatic Program algo-
rithm is complete.
Table 6 shows the outputs for Toggle Bit I on Q6.
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| 29LV040C-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY EQUAL SECTOR FLASH MEMORY |
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