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參數(shù)資料
| 型號： | 33742 |
| 廠商： | Motorola, Inc. |
| 元件分類： | CAN |
| 英文描述： | System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver |
| 中文描述： | 系統(tǒng)基礎(chǔ)芯片的增強(qiáng)型（SBC）的高速CAN收發(fā)器 |
| 文件頁數(shù)： | 25/52頁 |
| 文件大?。?/td> | 1087K |
| 代理商： | 33742 |
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33742
25
Figure 11. Behavior at 33742 Power-Up
Debug Mode: Hardware and Software Debug with the
33742
When the 33742 is mounted on the same printed circuit
board as the MCU it supplies, both application software and
33742 dedicated routines must be debugged. The following
features permit software debugging by allowing the possibility
of disabling the 33742 internal software watchdog timer.
Device Power-Up, Reset Terminal Connected to V
DD
At 33742 power-up, V
DD
voltage is provided; however, if no
SPI communication occurs to configure the device, a reset
occurs every 350 ms. In order to allow software debug and
avoid MCU reset, the
RST
terminal can be connected directly to
V
DD
by a jumper.
Debug Modes with Software Watchdog Disabled Though
SPI (Normal Debug, Standby Debug, and Stop Debug)
The watchdog software can be disabled through SPI. To
avoid unwanted watchdog disable while limiting the risk of
disabling the watchdog during 33742 normal operation,
watchdog disable must be done using the following sequence:
Step 1–Power down the 33742.
Step 2–Power up the 33742. This sets the BATFAIL bit,
allowing the 33742 to enter Normal Request mode.
Step 3–Write to the TIM1 subregister to allow the 33742
to enter Normal mode.
Step 4–Write to the MCR register with data 0000. This
enables the debug mode. Complete SPI byte is
0001 0000.
Step 5–Write to the MCR register normal debug. SPI byte
is 0001 x101.
Important
While in debug mode, the 33742 can be used
without having to clear the watchdog on a regular basis to
facilitate software and hardware debug.
Step 6–To leave the debug mode, write 0000 to the MCR
register.
At Step 2, the 33742 is in Normal Request. Steps 3, 4, and 5
should be completed consecutively and within the 350 ms time
period of the Normal Request mode. If not, the 33742 will go
into Reset mode and enter Normal Request again.
Figure 12,
page 26, illustrates debug mode selection.
Power-Up
Reset
Normal
Request
Normal
Trigger
Batfail
No Stop
Sleep
No
No
Yes
No
Yes
Yes
Behavior after power-up if no trigger appears
Behavior after reset of BATFAIL if no trigger appears
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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| 33742_08 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:System Basis Chip with Enhanced High Speed CAN Transceiver |
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