參數(shù)資料
型號(hào): 3D7314G-100
廠商: DATA DELAY DEVICES INC
元件分類: 通用總線功能
英文描述: MONOLITHIC QUADRUPLE FIXED DELAY LINE (SERIES 3D7314)
中文描述: SILICON DELAY LINE, TRUE OUTPUT, PDSO14
封裝: GULLWING, 14 PIN
文件頁數(shù): 1/4頁
文件大?。?/td> 143K
代理商: 3D7314G-100
3D7314
MONOLITHIC QUADRUPLE
FIXED DELAY LINE
(SERIES 3D7314)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Delay range:
10 through 500ns
Delay tolerance:
2% or 1.0ns
Temperature stability:
±
1% typical (0C-70C)
Vdd stability:
±
1% typical (4.75V-5.25V)
Minimum input pulse width:
20% of total delay
Static Idd:
1.3ma typical
Minimum input pulse width:
25% of total delay
FUNCTIONAL DESCRIPTION
The 3D7314 Quadruple Delay Line product family consists of fixed-
delay CMOS integrated circuits. Each package contains four matched,
independent delay lines. Delay values can range from 10ns through
500ns. The input is reproduced at the output without inversion, shifted
in time as per the user-specified dash number. The 3D7314 is TTL-
and CMOS-compatible, capable of driving ten 74LS-type loads, and
features both rising- and falling-edge accuracy.
The all-CMOS 3D7314 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 14-pin auto-insertable DIP and a space saving
surface mount 14-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PACKAGES
14
13
12
11
10
9
8
1
2
3
4
5
6
7
I1
N/C
I2
I3
I4
N/C
GND
VDD
N/C
O1
N/C
O2
O3
O4
3D7314-xx
3D7314G-xx Gull-Wing
DIP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
I1
N/C
I2
I3
I4
N/C
GND
VDD
N/C
O1
N/C
O2
O3
O4
3D7314D-xx
SOIC
(150 Mil)
PIN DESCRIPTIONS
I1
Delay Line 1 Input
I2
Delay Line 2 Input
I3
Delay Line 3 Input
I4
Delay Line 4 Input
O1
Delay Line 1 Output
O2
Delay Line 2 Output
O3
Delay Line 3 Output
O4
Delay Line 4 Output
VDD
+5 Volts
GND
Ground
N/C
No Connection
PART NUMBER
DIP-14
3D7314G
-10
-15
-20
-25
-30
-40
-50
-100
-200
-300
-400
-500
DELAY
PER LINE
(ns)
10
±
1.0
15
±
1.0
20
±
1.0
25
±
1.0
30
±
1.0
40
±
1.0
50
±
1.0
100
±
2.0
200
±
4.0
300
±
6.0
400
±
8.0
500
±
10.0
INPUT RESTRICTIONS
Absolute Max
Oper. Freq.
100.0 MHz
100.0 MHz
100.0 MHz
83.3 MHz
71.4 MHz
62.5 MHz
50.0 MHz
25.0 MHz
12.5 MHz
8.33 MHz
6.25 MHz
5.00 MHz
DIP-14
3D7314
-10
-15
-20
-25
-30
-40
-50
-100
-200
-300
-400
-500
SOIC-14
3D7314D
-10
-15
-20
-25
-30
-40
-50
-100
-200
-300
-400
-500
Max Operating
Frequency
33.3 MHz
22.2 MHz
16.7 MHz
13.3 MHz
11.1 MHz
8.33 MHz
6.67 MHz
3.33 MHz
1.67 MHz
1.11 MHz
0.83 MHz
0.67 MHz
Min Operating
Pulse Width
Absolute Min
Oper. P.W.
15.0 ns
22.5 ns
30.0 ns
37.5 ns
45.0 ns
60.0 ns
75.0 ns
150.0 ns
300.0 ns
450.0 ns
600.0 ns
750.0 ns
5.0 ns
5.0 ns
5.0 ns
6.0 ns
7.0 ns
8.0 ns
10.0 ns
20.0 ns
40.0 ns
60.0 ns
80.0 ns
100.0 ns
NOTES: Any delay between 10 and 500 ns not shown is also available.
2003 Data Delay Devices
For mechanical dimensions, click
here
.
For package marking details, click
here
.
Doc #03005
12/8/03
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
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